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For the Inventor, By the Inventor

Pleasant Valley, NY, United States of America

Thomas A Wallner

USPTO Granted Patents = 15 

Average Co-Inventor Count = 3.8

ph-index = 5

Forward Citations = 64(Granted Patents)


Location History:

  • Hopewell Junction, NY (US) (2012)
  • Pleasant Valley, NY (US) (2008 - 2016)
  • Albany, NY (US) (2015 - 2016)

Company Filing History:

goldMedal13 out of 164,108 
 
International Business Machines Corporation
 patents
silverMedal2 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 2008-2016

where 'Filed Patents' based on already Granted Patents

15 patents (USPTO):
1. 9412843 - Method for embedded diamond-shaped stress element (2016-08-09),
2. 9236398 - Passive devices for FinFET integrated circuit technologies (2016-01-12),
3. 9171935 - FinFET formation with late fin reveal (2015-10-27),
4. 8946064 - Transistor with buried silicon germanium for improved proximity control and optimized recess shape (2015-02-03),
5. 8916426 - Passive devices for FinFET integrated circuit technologies (2014-12-23),
6. 8787074 - Static random access memory test structure (2014-07-22),
7. 8569840 - Bipolar transistor integrated with metal gate CMOS devices (2013-10-29),
8. 8232172 - Stress enhanced transistor devices and methods of making (2012-07-31),
9. 8129234 - Method of forming bipolar transistor integrated with metal gate CMOS devices (2012-03-06),
10. 8124534 - Multiple exposure and single etch integration method (2012-02-28),
11. 8062951 - Method to increase effective MOSFET width (2011-11-22),
12. 7858485 - Structure and method for manufacturing trench capacitance (2010-12-28),
13. 7521772 - Monocrystalline extrinsic base and emitter heterojunction bipolar transistor and related methods (2009-04-21),
14. 7511317 - Porous silicon for isolation region formation and related structure (2009-03-31),
15. 7342293 - Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same (2008-03-11),

Title: Innovator Spotlight: Thomas A Wallner - Pioneering Semiconductor Technologies

Introduction:

Thomas A Wallner, an accomplished inventor based in Pleasant Valley, NY (US), has made significant contributions to the field of semiconductor devices with his innovative patented technologies.

Latest Patents:

1. Method for embedded diamond-shaped stress element: Thomas A Wallner's groundbreaking method involves manufacturing a semiconductor device with an embedded layer through precise anisotropic etching and epitaxial growth techniques.

2. Passive devices for FinFET integrated circuit technologies: His design structures for passive devices, particularly for electrostatic discharge protection in fin-type field-effect transistor integrated circuits, demonstrate his expertise in developing advanced semiconductor technologies.

Career Highlights:

With a total of 15 patents to his name, Thomas A Wallner has displayed a remarkable aptitude for devising cutting-edge solutions in the semiconductor industry. He has worked with renowned companies such as IBM (International Business Machines Corporation) and Globalfoundries Inc., further solidifying his reputation as a leading figure in the field.

Collaborations:

Throughout his career, Thomas A Wallner has collaborated with notable peers such as Thomas N Adam and Jin Zheng Wallner. These collaborations have led to the development of innovative technologies and have undoubtedly enriched the semiconductor landscape.

Conclusion:

In conclusion, Thomas A Wallner's dedication to pushing the boundaries of semiconductor technologies is evident in his prolific patent portfolio. His inventive spirit, coupled with his collaborative efforts and industry expertise, cements his status as a trailblazing inventor in the field.

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