The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2012
Filed:
Sep. 09, 2009
Thomas A. Wallner, Hopewell Junction, NY (US);
Ebenezer E. Eshun, Hopewell Junction, NY (US);
Daniel J. Jaeger, Hopewell Junction, NY (US);
Phung T. Nguyen, Hopewell Junction, NY (US);
Thomas A. Wallner, Hopewell Junction, NY (US);
Ebenezer E. Eshun, Hopewell Junction, NY (US);
Daniel J. Jaeger, Hopewell Junction, NY (US);
Phung T. Nguyen, Hopewell Junction, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A high-k gate dielectric layer and a metal gate layer are formed and patterned to expose semiconductor surfaces in a bipolar junction transistor region, while covering a CMOS region. A disposable material portion is formed on a portion of the exposed semiconductor surfaces in the bipolar junction transistor area. A semiconductor layer and a dielectric layer are deposited and patterned to form gate stacks including a semiconductor portion and a dielectric gate cap in the CMOS region and a cavity containing mesa over the disposable material portion in the bipolar junction transistor region. The disposable material portion is selectively removed and a base layer including an epitaxial portion and a polycrystalline portion fills the cavity formed by removal of the disposable material portion. The emitter formed by selective epitaxy fills the cavity in the mesa.