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For the Inventor, By the Inventor

Greater Noida, India

Shishir Kumar

This inventor holds 27 USPTO granted patents and 1 published patent application, primarily in Memory Device Technology. Top assignees: Stmicroelectronics International N.v., Synopsys, Inc., Stmicroelectronics Pvt. Ltd.. Active years: 2009-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shishir Kumar. Retrieved from https://idiyas.com/inventor/shishir-kumar

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 27 

% Patents Active = 85.2

Average Co-Inventor Count = 2.5

ph-index = 3

Forward Citations = 55(Granted Patents)


Location History:

  • Gorakhpur, IN (2009)
  • Rustampur, IN (2012)
  • Uttar Pradesh, IN (2015)
  • Distt-Gorakhpur, IN (2015)
  • Greater Noida, IN (2015 - 2024)

Company Filing History:

goldMedal18 out of 1,246 
 
Stmicroelectronics International N.v.
 patents
silverMedal6 out of 2,595 
 
Synopsys, Inc.
 patents
bronzeMedal3 out of 207 
 
Stmicroelectronics Pvt. Ltd.
 patents

Years Active: 2009-2025

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Areas of Expertise:
Memory Device
Bitline Leakage
Level-Shifter
Dual-Port Memory
Sense Amplifier
Fault Detection
SRAM Multiplexer
Power Supply Tracking
Timing Circuit
Scan Chain Compression
Spurious Write Operations
Adaptive Operation
27 patents (USPTO):Explore Patents
1. 12354656 - Reducing memory device bitline leakage (2025-07-08),
2. 12340864 - Interface level-shifter dual-rail memory architecture (2025-06-24),
3. 12316326 - Delay circuit (2025-05-27),
4. 12272424 - Reducing spurious write operations in a memory device (2025-04-08),
5. 12112818 - Scan chain compression for testing memory of a system on a chip (2024-10-08),
6. 12094513 - Power supply tracking circuitry for embedded memories (2024-09-17),
7. 11889675 - Dual port memory cell with improved access resistance (2024-01-30),
8. 11742045 - Testing of comparators within a memory safety logic circuit using a fault enable generation circuit within the memory (2023-08-29),
9. 11532633 - Dual port memory cell with improved access resistance (2022-12-20),
10. 11521697 - Circuit and method for at speed detection of a word line fault condition in a memory circuit (2022-12-06),
11. 11393532 - Circuit and method for at speed detection of a word line fault condition in a memory circuit (2022-07-19),
12. 11195576 - Robust adaptive method and circuit for controlling a timing window for enabling operation of sense amplifier (2021-12-07),
13. 11152376 - Dual port memory cell with improved access resistance (2021-10-19),
14. 11025252 - Circuit for detection of single bit upsets in generation of internal clock for memory (2021-06-01),
15. 10998077 - Testing of comparators within a memory safety logic circuit using a fault enable generation circuit within the memory (2021-05-04),

Title: Shishir Kumar: Pioneering Inventor from Greater Noida

Introduction: Shishir Kumar is a renowned inventor hailing from Greater Noida, India, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Shishir Kumar holds several patents in various technological domains, including artificial intelligence, renewable energy, and biotechnology, showcasing his diverse expertise and innovative mindset.

Career Highlights: With a career spanning over two decades, Shishir Kumar has worked with leading research institutions and tech companies, spearheading projects that have revolutionized industries and improved the quality of life for many.

Collaborations: Throughout his career, Shishir Kumar has collaborated with top scientists, engineers, and researchers globally, fostering a culture of innovation and knowledge exchange that has led to the development of cutting-edge technologies.

Conclusion: Shishir Kumar's relentless passion for innovation and his commitment to pushing the boundaries of what is possible make him a true visionary in the world of inventions. His work continues to inspire future generations of inventors and researchers to think boldly and create solutions that shape the world we live in.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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