The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2025

Filed:

Mar. 21, 2023
Applicant:

Synopsys, Inc., Sunnyvale, CA (US);

Inventors:

Shishir Kumar, Noida, IN;

Vinay Kumar, Aligarh, IN;

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 11/40 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1084 (2013.01); G11C 7/1096 (2013.01); G11C 11/40 (2013.01);
Abstract

A memory device includes bitcells connected to wordlines and bitlines, and driver circuitry that updates the bitcells. The driver circuitry includes first transistors, and a first inverter device. The first transistors drive a bitcell of a memory device. The first inverter device is coupled to the first transistors, and drives the first transistors with a first control signal. The first inverter device includes first inverter circuitry and second inverter circuitry. The first inverter circuitry receives a first signal, a first voltage, and a second voltage differing from the first voltage, and generates a first inverted signal based on the first signal, the first voltage and the second voltage. The second inverter circuitry receives the first inverted signal, the second voltage and a third voltage differing from the second voltage, and generates the first control signal based on the first inverted signal, the third voltage and the second voltage.


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