The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2022
Filed:
Sep. 30, 2021
Applicant:
Stmicroelectronics International N.v., Schiphol, NL;
Inventors:
Assignee:
STMICROELECTRONICS INTERNATIONAL N.V., Schiphol, NL;
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); H01L 27/11 (2006.01); G11C 5/06 (2006.01); G11C 11/412 (2006.01); H01L 27/02 (2006.01); G11C 8/16 (2006.01); G11C 11/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); G11C 5/063 (2013.01); G11C 8/16 (2013.01); G11C 11/412 (2013.01); G11C 11/417 (2013.01); H01L 27/0207 (2013.01);
Abstract
The present disclosure is directed to a circuit layout of a dual port static random-access-memory (SRAM) cell. The memory cell includes active regions in a substrate, with polysilicon gate electrodes on the active regions to define transistors of the memory cell. The eight transistor (8T) memory cell layout includes a reduced aspect ratio and non-polysilicon bit line discharge path routing by positioning an active region for the first port opposite an active region for the second port and consolidating power line nodes at a central portion of the memory cell.