Kaohsiung, Taiwan

Shao-Kuan Lee

This inventor holds 68 USPTO granted patents and 51 published patent applications, primarily in Semiconductor Interconnects. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2018-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shao-Kuan Lee. Retrieved from https://idiyas.com/inventor/shao-kuan-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 68 

% Patents Active = 100.0

Average Co-Inventor Count = 5.9

ph-index = 4

Forward Citations = 44(Granted Patents)

Forward Citations (Not Self Cited) = 14(Dec 10, 2025)


Location History:

  • Kaohsiung, TW (2018 - 2024)
  • Hsinchu, TW (2019 - 2024)

Company Filing History:


Years Active: 2018-2026

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Areas of Expertise:
Interconnect Structure
Air Gap
Thermal Management
Selective Deposition
Semiconductor Device
Heat Dissipation
Conductive Structure
Low Capacitance
Dielectric Layer
Thermally Conductive Layer
Self-Aligned Structure
Metallization Layer
68 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Shao-Kuan Lee in Semiconductor Technology

Introduction: Shao-Kuan Lee, a prominent inventor based in Kaohsiung, Taiwan, has made significant advancements in semiconductor device structures. With an impressive portfolio of 49 patents, Lee continues to push the boundaries of innovation in the field. His latest inventions demonstrate a mastery of complex methodologies that enhance the functionality and stability of semiconductor devices.

Latest Patents: Among Shao-Kuan Lee’s latest patents is the innovation titled **"Semiconductor device structure having air gap and methods of forming the same."** This patented method outlines a sophisticated process for creating an interconnect structure. The procedure involves forming a conductive layer over a dielectric layer, creating openings that expose portions of the dielectric surface, and meticulously constructing layers that lead to the implementation of air gaps in the device. This advancement not only aids in reducing resistance and enhancing performance but also exemplifies Lee's ingenuity in semiconductor design.

Another noteworthy patent is the **"Dielectric capping structure overlying a conductive structure to increase stability."** This invention relates to integrated chips where a dielectric structure secures a conductive structure, enhancing the device's overall stability. The design includes a carefully aligned dielectric capping layer that ensures optimal contact with the conductive structure, showcasing Lee's dedication to improving semiconductor technology.

Career Highlights: Shao-Kuan Lee has made remarkable contributions during his tenure at Taiwan Semiconductor Manufacturing Company Ltd. His role within the company has granted him the opportunity to lead groundbreaking projects and innovate solutions that address modern technological challenges. Lee's extensive knowledge and practical application of semiconductor technologies have earned him respect as a leading figure in this competitive field.

Collaborations: Throughout his career, Shao-Kuan Lee has collaborated with esteemed colleagues, including Hsin-Yen Huang and Shau-Lin Shue. These partnerships have fostered a rich environment for innovation, allowing for the sharing of ideas, strategies, and expertise, which have significantly contributed to the advancement of semiconductor technologies.

Conclusion: Shao-Kuan Lee's contributions to the field of semiconductor technology are both profound and far-reaching. His inventive spirit and collaborative efforts continue to inspire advancements in the industry, making him a key player in the ongoing evolution of technology. With 49 patents to his name, Lee exemplifies the impact that dedication and innovation can have on the future of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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