Company Filing History:

13 out of 1,787

Kla Tencor Corporation

patents

1 out of 641

Kla-tencor Technologies Corporation

Years Active: 2011-2023

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15 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11761880 - Process-induced distortion prediction and feedforward and feedback correction of overlay errors (2023-09-19),

2. 10509329 - Breakdown analysis of geometry induced overlay and utilization of breakdown analysis for improved overlay control (2019-12-17),

3. 10401279 - Process-induced distortion prediction and feedforward and feedback correction of overlay errors (2019-09-03),

4. 10379061 - Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool (2019-08-13),

5. 10249523 - Overlay and semiconductor process control using a wafer geometry metric (2019-04-02),

6. 10025894 - System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chucking (2018-07-17),

7. 9865047 - Systems and methods for effective pattern wafer surface measurement and analysis using interferometry tool (2018-01-09),

8. 9558545 - Predicting and controlling critical dimension issues and pattern defectivity in wafers using interferometry (2017-01-31),

9. 9546862 - Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool (2017-01-17),

10. 9513565 - Using wafer geometry to improve scanner correction effectiveness for overlay control (2016-12-06),

11. 9430593 - System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chucking (2016-08-30),

12. 9354526 - Overlay and semiconductor process control using a wafer geometry metric (2016-05-31),

13. 9029810 - Using wafer geometry to improve scanner correction effectiveness for overlay control (2015-05-12),

14. 8768665 - Site based quantification of substrate topography and its relation to lithography defocus and overlay (2014-07-01),

15. 8065109 - Localized substrate geometry characterization (2011-11-22),

Title: Innovations by Inventor Sathish Veeraraghavan

Introduction

Sathish Veeraraghavan is a distinguished inventor based in Santa Clara, CA, with an impressive portfolio of 15 patents. His work primarily focuses on enhancing semiconductor manufacturing processes through innovative solutions for measuring and correcting overlay errors, which are critical for the precision of lithography in chip production.

Latest Patents

Among his latest contributions, Sathish has developed two noteworthy patents: "Process-induced distortion prediction and feedforward and feedback correction of overlay errors" and "Breakdown analysis of geometry induced overlay and utilization of breakdown analysis for improved overlay control." These patents describe advanced systems and methods for predicting and measuring overlay errors using computational mechanics models. Through these innovations, Sathish enhances the accuracy of predictions regarding wafer geometry-induced overlay errors, which plays a significant role in improving semiconductor processes and lithography patterning.

Career Highlights

Sathish has made significant strides in his career, having worked with leading companies such as KLA-Tencor Corporation and KLA-Tencor Technologies Corporation. His experience in these organizations has allowed him to refine his expertise in semiconductor manufacturing and contribute to the development of cutting-edge technologies aimed at addressing complex challenges within the industry.

Collaborations

Throughout his career, Sathish has collaborated with several notable professionals, including his coworkers Jaydeep K. Sinha and Pradeep Vukkadala. These collaborations have fostered an environment of innovation and knowledge sharing, enhancing the potential of their collective research and developments in the semiconductor field.

Conclusion

Sathish Veeraraghavan's contributions to the field of semiconductor technology exemplify the vital role of inventions and innovations in advancing manufacturing processes. With his portfolio of patents and collaborative efforts, he continues to influence the industry positively, driving improvements that are crucial for the future of semiconductor fabrication.

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6 patents (EPO):

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7 patents pending (EPO):

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