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For the Inventor, By the Inventor

Glen Carbon, IL, United States of America

Qingmin Liu

This inventor holds 22 USPTO granted patents and 9 published patent applications and 11 EPO patents, primarily in Silicon-On-Insulator Technology. Top assignees: Globalwafers Co., Ltd., Sunedison Semiconductor Limited (uen201334164h), Globalwafers Co., Ltd.. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Qingmin Liu. Retrieved from https://idiyas.com/inventor/qingmin-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 22 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.1

ph-index = 4

Forward Citations = 88(Granted Patents)


Company Filing History:

goldMedal18 out of 315 
 
Globalwafers Co., Ltd.
 patents
silverMedal3 out of 38 
 
Sunedison Semiconductor Limited (uen201334164h)
 patents
bronzeMedal1 out of 26 
 
Globalwafers Co., Ltd.
 patents

Years Active: 2015-2026

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Areas of Expertise:
Silicon-On-Insulator
Charge Trapping Layers
Wafer Manufacturing
High Resistivity Substrate
Semiconductor Wafers
Heat Treatment
Substrate Loss Reduction
Surface Roughness
22 patents (USPTO):Explore Patents
1. 12672525 - Methods of manufacturing semiconductor-on-insulator wafers having charge trapping layers with controlled stress (2026-06-30),
2. 12424471 - Wafer boats for supporting semiconductor wafers in a furnace (2025-09-23),
3. 12046495 - Wafer boats for supporting semiconductor wafers in a furnace (2024-07-23),
4. 11798802 - Methods for stripping and cleaning semiconductor structures (2023-10-24),
5. 11239107 - High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency (2022-02-01),
6. 11183420 - High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss (2021-11-23),
7. 11145538 - High resistivity silicon-on-insulator structure and method of manufacture thereof (2021-10-12),
8. 10832937 - High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency (2020-11-10),
9. 10811308 - High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss (2020-10-20),
10. 10796945 - High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He—Nco-implantation (2020-10-06),
11. 10741437 - High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency (2020-08-11),
12. 10546771 - High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency (2020-01-28),
13. 10483379 - High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss (2019-11-19),
14. 10468295 - High resistivity silicon-on-insulator structure and method of manufacture thereof (2019-11-05),
15. 10458709 - Semiconductor wafer support ring for heat treatment (2019-10-29),

Title: Inventor Qingmin Liu: Pioneering Innovations in Glen Carbon

Introduction: Qingmin Liu, a distinguished inventor based in Glen Carbon, IL, is renowned for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Liu's recent patents include cutting-edge advancements in artificial intelligence, renewable energy systems, and sustainable transportation solutions, solidifying his reputation as a forward-thinker in the industry.

Career Highlights: With a career spanning over two decades, Liu has held key positions in various tech companies, leading research and development teams to create disruptive technologies that have reshaped the market landscape.

Collaborations: Liu has collaborated with top research institutions and universities worldwide, fostering a culture of innovation and knowledge-sharing that has led to numerous successful projects and patents.

Conclusion: Qingmin Liu's passion for innovation and his relentless drive to push the boundaries of technology make him a true trailblazer in the world of inventions, inspiring the next generation of inventors to dream big and create a better future for all.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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