Methods of manufacturing semiconductor-on-insulator wafers having charge trapping layers with controlled stress

Abstract

A method of preparing a multilayer structure includes providing a single crystal semiconductor handle substrate that includes a front surface, a back surface, a circumferential edge joining the front and back surfaces, and a central plane between the front and back surfaces. The single crystal semiconductor handle substrate has a minimum bulk region resistivity of at least about 500 Ohm-cm. The method also includes depositing a semiconductor layer on the front surface of the single crystal semiconductor handle substrate. Depositing the semiconductor layer is performed by two or more cycles of depositing a portion of the semiconductor layer and interrupting the deposition after the portion of the semiconductor layer has been deposited to anneal the portion of the semiconductor layer.