Globalwafers Co., Ltd.

Sunedison Semiconductor Limited (uen201334164h)

Sunedison Semiconductor Limited

Qingmin Liu

Gang Wang

Shawn George Thomas

Jeffrey Louis Libbert

Robert Wendell Standley

William L Luter

Sumeet S Bhagavat

Andrew Marquis Jones

Jeffery L Libbert

Junting Yang

Haihe Liang

Andrew M Jones

A wafer boat for supporting a plurality of semiconductor wafers in a furnace is disclosed. The wafer boat includes a set of fingers each having a contact protuberance which contacts and supports a semiconducting wafer. The contact protuberances may be arranged in a rotationally symmetric pattern about the wafer boat.

Wafer boats for supporting semiconductor wafers in a furnace

Methods for removing an oxide film and for cleaning silicon-on-insulator structures are disclosed. The methods may involve immersing the silicon-on-insulator structure in a stripping bath to strip an oxide film from the surface of the silicon-on-insulator structure. The stripped silicon-on-insulator structure is immersed in an ozone bath comprising ozone. The ozone-treated silicon-on-insulator structure may be immersed in an SC-1 bath comprising ammonium hydroxide and hydrogen peroxide to clean the structure.

Methods for stripping and cleaning semiconductor structures

A multilayer semiconductor on insulator structure is provided in which the handle substrate and an epitaxial layer in interfacial contact with the handle substrate comprise electrically active dopants of opposite type. The epitaxial layer is depleted by the handle substrate free carriers, thereby resulting in a high apparent resistivity, which improves the function of the structure in RF devices.

High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a Group IVA nitride layer in contact with the semiconductor handle substrate, the Group IVA nitride layer selected from the group consisting of carbon nitride, silicon carbon nitride, and a combination thereof; a dielectric layer in contact with the Group IVA nitride layer; and a semiconductor device layer in contact with the dielectric layer.

High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss

A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the stability of the underlying charge trapping layer.

High resistivity silicon-on-insulator structure and method of manufacture thereof

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and comprises a region of nitrogen-reacted nanovoids in the front surface region; a silicon dioxide layer on the surface of the semiconductor handle substrate; a dielectric layer in contact with the silicon dioxide layer; and a semiconductor device layer in contact with the dielectric layer.

High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He&#x2014;Nco-implantation

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a semiconductor nitride layer in contact with the semiconductor handle substrate, the semiconductor nitride layer selected from the group consisting of aluminum nitride, boron nitride, indium nitride, gallium nitride, aluminum gallium nitride, aluminum gallium indium nitride, aluminum gallium indium boron nitride, and combinations thereof; a dielectric layer in contact with the semiconductor nitride layer; and a semiconductor device layer in contact with the dielectric layer.

A support ring for supporting a semiconductor wafer in a boat of a vertical furnace used in processing of the semiconductor wafer includes a semicircular segment. The semicircular segment has an upper surface, a lower surface opposite the upper surface, a radial inner wall defining an inner radius, and a radial outer wall defining an outer radius. The support ring further includes protrusions in the upper surface of the semicircular segment. The protrusions extend above the upper surface.

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Glen Carbon, IL, United States of America

Qingmin Liu