San Diego, CA, United States of America

Periannan Chidambaram

This inventor holds 48 USPTO granted patents and 49 published patent applications and 6 EPO patents, primarily in Integrated Circuits. Top assignee: Qualcomm Incorporated. Active years: 2018-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Periannan Chidambaram. Retrieved from https://idiyas.com/inventor/periannan-chidambaram

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 48 

% Patents Active = 85.4

 

Average Co-Inventor Count = 3.5

ph-index = 6

Forward Citations = 77(Granted Patents)


Company Filing History:


Years Active: 2018-2026

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Areas of Expertise:
Integrated Circuits
Trench Capacitors
3D Packaging
Dynamic Memory
Field Effect Transistors
Capacitor Structures
Machine Learning
Hybrid Bonding
Voltage Regulation
Semiconductor Devices
Impedance Matching
Neural Networks
48 patents (USPTO):Explore Patents

Title: Periannan Chidambaram: An Innovative Mindset Shaping Technological Solutions

Introduction:

Throughout his career, Periannan Chidambaram has continually demonstrated a remarkable ability to develop groundbreaking solutions. With an innovative mindset and technical expertise, he has made significant contributions in the field of technology. This article delves into his latest patents, notable career highlights, and collaborations that have propelled him as a leading figure in the industry.

Latest Patents:

Periannan Chidambaram's innovative prowess is reflected in his latest patents. Two notable patents include:

1. Substrate Comprising an Inductor and a Capacitor Located in an Encapsulation Layer: This patent describes a package that incorporates a power amplifier and a substrate connected to it. The encapsulation layer contains a capacitor device and an inductor, both of which are electrically coupled to function as matching network elements for the power amplifier. The capacitor device is configured to be grounded, enhancing the efficiency of the package.

2. Package Comprising Stacked Filters with a Shared Substrate Cap: This patent introduces a package featuring stacked filters with a shared substrate cap. The package comprises a substrate cap, two polymer frames (forming voids between the substrate cap and each filter), interconnects, an encapsulation layer, and through encapsulation vias. The inventive design allows for efficient encapsulation of the filters, interconnects, and related components, optimizing their performance.

Career Highlights:

Periannan Chidambaram's notable career highlights further underscore his capabilities as a leading innovator. Working at Qualcomm Incorporated, one of the prominent technology companies, Chidambaram has consistently delivered exceptional results. He has accumulated an impressive portfolio with 35 patents, showcasing his dedication to pushing the boundaries of technological advancements. These patents encompass various aspects of electronic packaging and communication systems.

Collaborations:

Chidambaram's collaborations with esteemed peers have played a crucial role in his career. Notably, he has worked alongside Jonghae Kim and Milind Shah, both accomplished professionals in the industry. Collaborative initiatives with such talented individuals have fostered an environment for novel ideas and innovative solutions, leading to groundbreaking technological advancements.

Conclusion:

Periannan Chidambaram is an exceptional innovator and inventor who has consistently pushed the boundaries of technological possibilities. Through his remarkable ability to develop groundbreaking solutions, he has made significant contributions in the field of technology. With an impressive portfolio of patents, collaborations with industry leaders, and a successful career at Qualcomm Incorporated, Chidambaram continues to shape the landscape of innovations, leaving a lasting impact on the industry as a whole.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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