The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2026
Filed:
Sep. 19, 2022
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Qingqing Liang, San Diego, CA (US);
Periannan Chidambaram, San Diego, CA (US);
George Pete Imthurn, San Diego, CA (US);
Stanley Seungchul Song, San Diego, CA (US);
Assignee:
QUALCOMM INCORPORATED, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/20 (2026.01); H10D 64/23 (2025.01); H10D 86/00 (2025.01); H10W 10/00 (2026.01); H10W 10/17 (2026.01); H10W 20/00 (2026.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10W 20/20 (2026.01); H10D 64/251 (2025.01); H10D 86/201 (2025.01); H10W 10/014 (2026.01); H10W 10/17 (2026.01); H10W 20/023 (2026.01); H10W 20/056 (2026.01); H10W 20/081 (2026.01); H10W 20/435 (2026.01);
Abstract
Disclosed are integrated circuit structures with through-substrate vias (TSVs) processed through self-aligned contact modules. As a result, much smaller and/or denser TSVs are formed with low mechanical stress. The denser TSVs allow for more flexible wiring options.