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Paul Grudowski

This inventor holds 29 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Freescale Semiconductor,inc., Nxp B.v., Motorola Corporation. Active years: 2002-2022.

USPTO Granted Patents = 29

% Patents Active = 51.7

Average Co-Inventor Count = 3.0

ph-index = 7

Forward Citations = 350(Granted Patents)

Company Filing History:

25 out of 5,491

Freescale Semiconductor,inc.

Years Active: 2002-2022

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Areas of Expertise:

Semiconductor Device

PN Junction Diode

Stressor Integration

Transistor Structure

Electronic Device

Multilayer Deposition

Gate Security Feature

Insulating Layers

Tensile Stressor

Interlayer Dielectric

Source Drain Stressors

Nitrided Gate Dielectric

29 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11222961 - Lateral semiconductor device having raised source and drain, and method of manufacture thererof (2022-01-11),

2. 10580906 - Semiconductor device comprising a PN junction diode (2020-03-03),

3. 9847389 - Semiconductor device including an active region and two layers having different stress characteristics (2017-12-19),

4. 8980734 - Gate security feature (2015-03-17),

5. 8569858 - Semiconductor device including an active region and two layers having different stress characteristics (2013-10-29),

6. 8021957 - Process of forming an electronic device including insulating layers having different strains (2011-09-20),

7. 7843011 - Electronic device including insulating layers having different strains (2010-11-30),

8. 7745298 - Method of forming a via (2010-06-29),

9. 7736957 - Method of making a semiconductor device with embedded stressor (2010-06-15),

10. 7714318 - Electronic device including a transistor structure having an active region adjacent to a stressor layer (2010-05-11),

11. 7700499 - Multilayer silicon nitride deposition for a semiconductor device (2010-04-20),

12. 7687354 - Fabrication of a semiconductor device with stressor (2010-03-30),

13. 7678698 - Method of forming a semiconductor device with multiple tensile stressor layers (2010-03-16),

14. 7579228 - Disposable organic spacers (2009-08-25),

15. 7538002 - Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressors (2009-05-26),

Title: The Innovative Contributions of Paul Grudowski

Introduction: Paul Grudowski, based in Austin, TX, is a prominent inventor with a significant portfolio of 29 patents. His work primarily focuses on advancements in semiconductor technology, reflecting his commitment to innovation in the field.

Latest Patents: Among Paul Grudowski's latest patents are two notable inventions. The first is a "Lateral semiconductor device having raised source and drain, and method of manufacture thereof," which presents a novel substrate structure and gate design that enhances the efficiency of semiconductor devices. The second patent, "Semiconductor device comprising a PN junction diode," describes a unique pn junction formed beneath a buried oxide layer, aimed at improving the performance of various semiconductor applications.

Career Highlights: Grudowski has made significant contributions through his work at well-regarded companies within the semiconductor industry, including Freescale Semiconductor, Inc. and NXP B.V. His innovative spirit and technical expertise have enabled advancements that are vital to the ongoing development of semiconductor technologies.

Collaborations: Throughout his career, Paul has collaborated with talented professionals such as Venkat Kolagunta and Vance H. Adams. These partnerships have fostered a dynamic environment for innovation, allowing for the exchange of ideas and collaborative problem-solving.

Conclusion: Paul Grudowski's extensive patent portfolio and his impactful work in semiconductor technology demonstrate his dedication to innovation. As he continues to develop groundbreaking solutions, his contributions are likely to shape the future of the industry, underscoring the importance of inventors in advancing technology.

Profile summary based on public USPTO records.

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