The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2010

Filed:

Jan. 31, 2007
Applicants:

Paul A. Grudowski, Austin, TX (US);

Venkat R. Kolagunta, Austin, TX (US);

Mehul D. Shroff, Austin, TX (US);

Inventors:

Paul A. Grudowski, Austin, TX (US);

Venkat R. Kolagunta, Austin, TX (US);

Mehul D. Shroff, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electronic device can include a field isolation region and a first insulating layer having a first strain and having a portion, which from a top view, lies entirely within the field isolation region. The electronic device can also include a second insulating layer having a second strain different from the first strain and including an opening. From a top view, the portion of the first insulating layer can lie within the opening in the second insulating layer. In one embodiment, the field isolation region can include a dummy structure and the portion of the first insulating layer can overlie the dummy structure. A process of forming the electronic device can include forming an island portion of an insulating layer wherein from a top view, the island portion lies entirely within the field isolation region.


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