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For the Inventor, By the Inventor

Hillsboro, OR, United States of America

Nazila Haratipour

This inventor holds 46 USPTO granted patents and 40 published patent applications and 4 EPO patents, primarily in Thin Film Transistors. Top assignee: Intel Corporation. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nazila Haratipour. Retrieved from https://idiyas.com/inventor/nazila-haratipour

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 46 

% Patents Active = 97.8

 

Average Co-Inventor Count = 9.0

ph-index = 4

Forward Citations = 76(Granted Patents)


Location History:

  • Hillsboro, OR (US) (2021 - 2024)
  • Portland, OR (US) (2023 - 2024)

Company Filing History:

goldMedal46 out of 56,322 
 
Intel Corporation
 patents

Years Active: 2021-2026

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Areas of Expertise:
Thin Film Transistors
Ferroelectric Capacitors
Integrated Circuit Fabrication
Contact Resistance
Vertical Architecture
Metal Oxide Buffers
Ultra-Dense Logic
High Performance Logic
Memory Cells
Trench Capacitors
Epitaxial Layers
Compute-In-Memory Circuits
46 patents (USPTO):Explore Patents
1. 12757430 - Low-resistance and thermally stable contacts with boride, indium, or gallium metal compound layers (2026-10-06),
2. 12757407 - Replacement electrode process for 3D ferroelectric memory (2026-10-06),
3. 12731626 - Selective ferroelectric deployment for single-transistor, multiple-capacitor devices (2026-09-08),
4. 12720851 - Capacitor structure embedded within source or drain region (2026-08-25),
5. 12720819 - Source or drain metallization prior to contact formation in stacked transistors (2026-08-25),
6. 12720778 - Integrated circuits with high dielectric constant interfacial layering (2026-08-25),
7. 12720760 - Ferroelectric capacitor within backside interconnect (2026-08-25),
8. 12713618 - SELF-ALIGNED PATTERNING OF PLATE LINES IN THREE-DIMENSIONAL FERROELECTRIC CAPACITORS (2026-08-18),
9. 12660248 - Low-resistance and thermally stable contacts with phosphide or arsenide metal compound layers (2026-06-16),
10. 12660198 - Ferroelectric three-dimensional memory (2026-06-16),
11. 12593486 - Dual contact process with selective deposition (2026-03-31),
12. 12575170 - Low temperature, high germanium, high boron SiGe:B pEPI with a silicon rich capping layer for ultra-low PMOS contact resistivity and thermal stability (2026-03-10),
13. 12568644 - Contact over active gate structures with trench contact layers for advanced integrated circuit structure fabrication (2026-03-03),
14. 12439669 - Co-deposition of titanium and silicon for improved silicon germanium source and drain contacts (2025-10-07),
15. 12426342 - Low germanium, high boron silicon rich capping layer for PMOS contact resistance thermal stability (2025-09-23),

Title: Inventor Nazila Haratipour

Introduction: Nazila Haratipour is a talented inventor based in Hillsboro, Oregon. Despite the common misconception, Nazila is a male inventor who has made significant contributions to the field of innovation.

Latest Patents: Nazila Haratipour holds several patents in various technological fields, including artificial intelligence, renewable energy, and medical devices. His innovative ideas have led to the development of cutting-edge solutions that have the potential to impact industries worldwide.

Career Highlights: Throughout his career, Nazila Haratipour has demonstrated a keen ability to think outside the box and create novel inventions. His dedication to pushing the boundaries of technology has earned him recognition as a forward-thinker in the innovation community.

Collaborations: Nazila Haratipour has collaborated with leading research institutions, universities, and companies to bring his inventions to life. His partnerships have been instrumental in turning his ideas into tangible products that have the power to revolutionize the way we live and work.

Conclusion: In conclusion, Nazila Haratipour is a visionary inventor who continues to make waves in the world of innovation. His passion for creating groundbreaking solutions underscores his commitment to shaping a better future through technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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