The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2026
Filed:
Sep. 30, 2022
Intel Corporation, Santa Clara, CA (US);
Christopher Neumann, Portland, OR (US);
Cory Weinstein, Portland, OR (US);
Nazila Haratipour, Portland, OR (US);
Brian Doyle, Portland, OR (US);
Sou-Chi Chang, Portland, OR (US);
Tristan Tronic, Aloha, OR (US);
Shriram Shivaraman, Hillsboro, OR (US);
Uygar Avci, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Multiple-ferroelectric capacitor structures in memory devices, including in integrated circuit devices, and techniques for forming the structures. Insulators separating individual outer plates in a ferroelectric capacitor array are supported between wider portions of a shared, inner plate. Wider portions of an inner plate may be formed in lateral recesses between insulating layers. Ferroelectric material may be deposited over the inner plate between insulating layers after removing sacrificial layers. An etch-stop layer may protect the inner plate when sacrificial layers are removed. An etch-stop or interface layer may remain over the inner plate adjacent insulators.