IDiyas

For the Inventor, By the Inventor

San Jose, CA, United States of America

Narasimha R Lanka

USPTO Granted Patents = 11 

 

Average Co-Inventor Count = 4.6

ph-index = 2

Forward Citations = 13(Granted Patents)


Location History:

  • San Jose, CA (US) (2017 - 2020)
  • Dublin, CA (US) (2020 - 2024)

Company Filing History:

goldMedal11 out of 54,664 
 
Intel Corporation
 patents

Years Active: 2017-2025

where 'Filed Patents' based on already Granted Patents

11 patents (USPTO):
1. 12332826 - Die-to-die interconnect (2025-06-17),
2. 12321305 - Sideband interface for die-to-die interconnects (2025-06-03),
3. 12316343 - PHY-based retry techniques for die-to-die interfaces (2025-05-27),
4. 12181966 - Reduction of latency impact of on-die error checking and correction (ECC) (2024-12-31),
5. 12117960 - Approximate data bus inversion technique for latency sensitive applications (2024-10-15),
6. 11971841 - Link layer-PHY interface adapter (2024-04-30),
7. 11954360 - Technology to provide accurate training and per-bit deskew capability for high bandwidth memory input/output links (2024-04-09),
8. 11599497 - High performance interconnect (2023-03-07),
9. 10789201 - High performance interconnect (2020-09-29),
10. 10560081 - Method, apparatus, system for centering in a high performance interconnect (2020-02-11),
11. 9692402 - Method, apparatus, system for centering in a high performance interconnect (2017-06-27),

Title: Innovator Spotlight: Narasimha R Lanka

Introduction:

Narasimha R Lanka is a prolific inventor based in San Jose, CA (US) known for his innovative contributions in the field of high-performance interconnect technologies. With a total of 4 patents to his name, he has made significant strides in enhancing communication efficiency between devices.

Latest Patents:

Lanka's latest patents revolve around high-performance interconnect technologies. His groundbreaking work includes the development of devices equipped with receiver and transmitter functionalities to optimize link training sequences. By accurately determining the number of extension devices in a link and implementing clock compensation ordered sets, his inventions aim to improve data transmission reliability and speed.

Career Highlights:

A dedicated professional, Narasimha R Lanka is associated with Intel Corporation, a renowned technology company at the forefront of innovation in the semiconductor industry. Through his role at Intel, he continues to push the boundaries of technological advancement and drive forward-thinking solutions in interconnectivity.

Collaborations:

In his collaborative endeavors, Narasimha R Lanka has worked alongside esteemed colleagues such as Zuoguo Wu and Mahesh U Wagh. Together, they have combined their expertise to tackle complex challenges and develop cutting-edge technologies that redefine the possibilities in the realm of high-performance interconnect solutions.

Conclusion:

In conclusion, Narasimha R Lanka's inventive spirit and dedication to advancing interconnect technologies have solidified his position as a key figure in the innovation landscape. His patents stand as a testament to his ingenuity and commitment to driving progress in the field. As he continues to pioneer new developments, the future looks bright for further advancements in high-performance interconnectivity, thanks to the visionary contributions of Narasimha R Lanka.

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