The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Jun. 29, 2022
Intel Corporation, Santa Clara, CA (US);
Debendra Das Sharma, Saratoga, CA (US);
Swadesh Choudhary, Mountain View, CA (US);
Narasimha Lanka, Dublin, CA (US);
Lakshmipriya Seshan, Sunnyvale, CA (US);
Gerald Pasdast, San Jose, CA (US);
Zuoguo Wu, San Jose, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A port is to couple to another die over a die-to-die (D2D) link and includes physical layer (PHY) circuitry including a first number of sideband lanes to carry data for use in training and management of the D2D link, and a second number of mainband lanes to implement a main data path of the D2D link. The mainband lanes include a forwarded clock lane, a valid lane, and a plurality of data lanes. A logical PHY coordinates functions of the sideband lanes and the mainband lanes.