The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2025
Filed:
Mar. 26, 2021
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Narasimha Lanka, Dublin, CA (US);
Lohit Yerva, Mountain View, CA (US);
Mohammad Rashid, San Jose, CA (US);
Kuljit S. Bains, Olympia, WA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2023.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/5381 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 25/0652 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/0652 (2013.01);
Abstract
A multi-chip device having a configurable physical interface in a logic die to on-package memory is provided. The configurable physical interface to allow a connection from a signal on the memory interface to be selected based on whether the logic die is mirrored or non-mirrored.