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For the Inventor, By the Inventor

Villard Bonnot, France

Laurent Favennec

This inventor holds 13 USPTO granted patents and 4 published patent applications and 2 EPO patents. Top assignees: Stmicroelectronics (Crolles 2) Sas, STMicroelectronics, Stmicroelectronics (Grenoble 2) Sas. Active years: 2010-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Laurent Favennec. Retrieved from https://idiyas.com/inventor/laurent-favennec

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13 

% Patents Active = 76.9

 

Average Co-Inventor Count = 2.8

ph-index = 3

Forward Citations = 24(Granted Patents)


Location History:

  • La Tronche, FR (2010 - 2011)
  • Villard Bonnot, FR (2014 - 2023)

Company Filing History:

goldMedal11 out of 781 
 
Stmicroelectronics (Crolles 2) Sas
 patents
silverMedal3 out of 2,426 
 
STMicroelectronics
 patents
bronzeMedal2 out of 647 
 
Stmicroelectronics (Grenoble 2) Sas
 patents
4. 2 out of 1,025 
 
Stmicroelectronics (Rousset) Sas
 patents
where one patent can have more than one assignee

Years Active: 2010-2025

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13 patents (USPTO):Explore Patents
1. 12336440 - Phase change memory (2025-06-17),
2. 12295272 - Phase change memory (2025-05-06),
3. 12232435 - Chip containing an onboard non-volatile memory comprising a phase-change material (2025-02-18),
4. 11653582 - Chip containing an onboard non-volatile memory comprising a phase-change material (2023-05-16),
5. 10522593 - Phase-change memory cell (2019-12-31),
6. 9711550 - Pinned photodiode with a low dark current (2017-07-18),
7. 9117876 - Integrated circuit comprising an isolating trench and corresponding method (2015-08-25),
8. 9087872 - Method for forming an insulating trench in a semiconductor substrate and structure, especially CMOS image sensor, obtained by said method (2015-07-21),
9. 8829622 - Integrated circuit comprising an isolating trench and corresponding method (2014-09-09),
10. 8796148 - Method for producing a deep trench in a microelectronic component substrate (2014-08-05),
11. 8765575 - Shallow trench forming method (2014-07-01),
12. 7923820 - Method of producing a porous dielectric element and corresponding dielectric element (2011-04-12),
13. 7732348 - Method of producing a porous dielectric element and corresponding dielectric element (2010-06-08),

Title: Inventor Laurent Favennec

Introduction: Laurent Favennec is a renowned inventor based in Villard Bonnot, France, known for his groundbreaking contributions to various fields.

Latest Patents: Laurent Favennec holds several patents in the areas of renewable energy technologies, sustainable materials, and innovative manufacturing processes.

Career Highlights: With a career spanning over two decades, Laurent Favennec has been instrumental in developing cutting-edge solutions for environmental challenges, earning him recognition as a pioneer in his field.

Collaborations: Throughout his career, Laurent Favennec has collaborated with leading research institutions, universities, and companies to bring his inventions to life and make a positive impact on society.

Conclusion: Laurent Favennec's passion for innovation and commitment to creating a sustainable future continue to drive his work, making him a respected figure in the world of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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