Kuo-Nan Yang

This inventor holds 116 USPTO granted patents and 26 published patent applications, primarily in Integrated Circuit Design (CPC class G06F30-394). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Realtek Semiconductor Inc.. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kuo-Nan Yang. Retrieved from https://idiyas.com/inventor/kuo-nan-yang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 116 (Patent Applications = 26)

% Patents Active = 91.4

Average Co-Inventor Count = 4.6

ph-index = 8

Forward Citations = 402(Granted Patents)

Forward Citations (Not Self Cited) = 362(Dec 10, 2025)

Inventors with similar research interests:

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Location History:

Taipei, TW (2003 - 2007)
Hsin-Chu, TW (2007 - 2024)

Company Filing History:

113 out of 42,926

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

3 out of 3,315

Realtek Semiconductor Inc.

patents

Years Active: 2003-2026

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Areas of Expertise:

Integrated Circuit

Semiconductor Structure

Power Grid

Logic Cell

Conductive Layers

Backside Power Routing

Nano-Sheet Structures

Layout Diagram

Standard-Cell

Manufacturing Method

Circuit Layouts

Power Domains

116 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12675627 - Parasitic resistance and capacitance extraction methods and non-transitory computer-readable media thereof (2026-07-07),

2. 12507438 - Semiconductor structure with contact rail and method for forming the same (2025-12-23),

3. 12433032 - Semiconductor structure including boundary header cell and method for manufacturing the same (2025-09-30),

4. 12418294 - Logic cell structure and integrated circuit with the logic cell structure (2025-09-16),

5. 12394715 - Diagonal backside power and signal routing for an integrated circuit (2025-08-19),

6. 12380265 - Integrated circuit and method of forming the same (2025-08-05),

7. 12302642 - Integrated circuit and method of forming the same (2025-05-13),

8. 12254260 - Systems and methods for integrated circuit layout (2025-03-18),

9. 12243821 - Conductive line structures and method of forming same (2025-03-04),

10. 12191248 - Semiconductor arrangement and method of making (2025-01-07),

11. 12190037 - Multiple power domains using nano-sheet structures (2025-01-07),

12. 12182488 - Semiconductor device including standard-cell-adapted power grid arrangement (2024-12-31),

13. 12176288 - Semiconductor device including frontside power mesh and backside power mesh and manufacturing method thereof (2024-12-24),

14. 12159899 - Semiconductor device (2024-12-03),

15. 12112117 - Method of manufacturing a semiconductor device including PG-aligned cells (2024-10-08),

Title: The Innovative Journey of Inventor Kuo-Nan Yang

Introduction: Kuo-Nan Yang, a pioneering inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking inventions and patents.

Latest Patents: Kuo-Nan Yang holds several patents in the areas of semiconductor technology, renewable energy, and nanotechnology, showcasing his versatility and ingenuity in creating solutions for complex challenges.

Career Highlights: With a career spanning over two decades, Kuo-Nan Yang has worked tirelessly to push the boundaries of innovation. His work has not only revolutionized the industry but has also inspired a new generation of inventors to think outside the box.

Collaborations: Throughout his career, Kuo-Nan Yang has collaborated with leading research institutions, universities, and tech companies to bring his inventions to life. His ability to work in diverse teams and leverage collective expertise has been instrumental in his success.

Conclusion: In conclusion, Kuo-Nan Yang stands as a beacon of innovation, with a remarkable track record of inventions that have shaped the technological landscape. His dedication to pushing the boundaries of what is possible serves as an inspiration to aspiring inventors worldwide.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

26 patents pending: