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For the Inventor, By the Inventor

San Jose, CA, United States of America

Kevin C Weaver

This inventor holds 20 USPTO granted patents, primarily in Semiconductor Technology. Top assignees: National Semiconductor Corporation, Lsi Logic Corporation, Other. Active years: 1999-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kevin C Weaver. Retrieved from https://idiyas.com/inventor/kevin-c-weaver

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 20

% Patents Active = 100.0

Average Co-Inventor Count = 2.5

ph-index = 5

Forward Citations = 97(Granted Patents)


Company Filing History:

goldMedal15 out of 4,791 
 
National Semiconductor Corporation
 patents
silverMedal4 out of 3,715 
 
Lsi Logic Corporation
 patents
bronzeMedal1 out of 834,570 
Other
 patents

Years Active: 1999-2010

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Areas of Expertise:
Voltage Contrast Test
Semiconductor Die
De-packaging Process
Stacked Die
Non-destructive Removal
Electrostatic Discharge
Integrated Circuit
Thickness Measurement
Vibration Resistant Module
Heat Spreader Removal
Low Capacitance Interconnect
Chip on Tape
20 patents (USPTO):Explore Patents
1. 7848562 - Method of reducing the time required to perform a passive voltage contrast test (2010-12-07),
2. 7470553 - Built-in design edit structures (2008-12-30),
3. 7352001 - Method of editing a semiconductor die (2008-04-01),
4. 7279343 - De-packaging process for small outline transistor packages (2007-10-09),
5. 7250310 - Process for forming and analyzing stacked die (2007-07-31),
6. 7172977 - Method for non-destructive removal of cured epoxy from wafer backside (2007-02-06),
7. 7087927 - Semiconductor die with an editing structure (2006-08-08),
8. 6952106 - E-beam voltage potential circuit performance library (2005-10-04),
9. 6937351 - Non-destructive method of measuring the thickness of a semiconductor wafer (2005-08-30),
10. 6842021 - System and method for detecting location of a defective electrical connection within an integrated circuit (2005-01-11),
11. 6801046 - Method of testing the electrostatic discharge performance of an IC device (2004-10-05),
12. 6518074 - Backside IC device preparation process (2003-02-11),
13. 6424167 - Vibration resistant test module for use with semiconductor device test apparatus (2002-07-23),
14. 6411111 - Electron-electro-optical debug system E2ODS (2002-06-25),
15. 6117352 - Removal of a heat spreader from an integrated circuit package to permit (2000-09-12),

Title: The Innovations of Kevin C. Weaver in Semiconductor Technology

Introduction

Kevin C. Weaver, based in San Jose, CA, is an accomplished inventor with a significant portfolio comprising 20 patents. His contributions to the field of semiconductor technology have advanced the way integrated circuits are tested and debugged, making processes more efficient and effective.

Latest Patents

Two of Weaver's latest patents showcase his innovative approaches to enhancing the functionality and reliability of semiconductor devices. The first patent details a "Method of Reducing the Time Required to Perform a Passive Voltage Contrast Test." This invention allows for the digitization of passive voltage contrast images to generate contrast data, which is then compared to computer-aided design (CAD) data for the semiconductor device. This advancement significantly streamlines the testing process.

His second notable patent, titled "Built-in Design Edit Structures," outlines a sophisticated structure and method for debugging or adjusting integrated circuit parameters. This patent describes the formation of edit structures within the IC device that connect to various circuitry components via vias through the passivation layer and metal interconnects, optimizing adjustments and facilitating the debugging process.

Career Highlights

Throughout his career, Kevin C. Weaver has made substantial contributions while working for esteemed companies such as National Semiconductor Corporation and LSI Logic Corporation. His innovations in these roles have had a lasting impact on semiconductor technology, influencing both industry practices and standards.

Collaborations

Weaver has collaborated with notable professionals in the field, including his coworkers Henry Acedo and Zachary Joshua Gemmill. Their joint efforts have further advanced semiconductor design and functionality, marking a significant period of innovation within their respective organizations.

Conclusion

Kevin C. Weaver stands out as a pivotal figure in the semiconductor industry. His 20 patents reflect a dedication to innovation that continually pushes the boundaries of technology. Through his latest patents and collaborations, Weaver is not only enhancing current practices but also shaping the future of integrated circuit technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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