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For the Inventor, By the Inventor

Parsberg, Germany

Johann Gatterbauer

This inventor holds 19 USPTO granted patents and 4 published patent applications, primarily in Semiconductor Packaging. Top assignee: Infineon Technologies Ag. Active years: 2014-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Johann Gatterbauer. Retrieved from https://idiyas.com/inventor/johann-gatterbauer

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 19 

% Patents Active = 94.7

Average Co-Inventor Count = 3.5

ph-index = 2

Forward Citations = 17(Granted Patents)


Location History:

  • Parsberg, AT (2017 - 2020)
  • Parsberg, DE (2014 - 2024)

Company Filing History:

goldMedal19 out of 15,040 
 
Infineon Technologies Ag
 patents

Years Active: 2014-2024

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Areas of Expertise:
Chip Package
Electrical Contact
Aluminum Oxide Layer
Layer Structure
Power Metallization
Light Emitting Chips
Contact Pads
Sidewall Spacers
Metal Pad Structure
Semiconductor Devices
Conductive Pads
Die Arrangement
19 patents (USPTO):Explore Patents
1. 12040288 - Chip package and method of forming a chip package (2024-07-16),
2. 12033972 - Chip package, method of forming a chip package and method of forming an electrical contact (2024-07-09),
3. 11735534 - Chip package and method of forming a chip package (2023-08-22),
4. 11424201 - Method of forming an aluminum oxide layer, metal surface with aluminum oxide layer, and electronic device (2022-08-23),
5. 11328935 - Method of forming a layer structure, layer structure, method of forming a contact structure, method of forming a chip package, and chip package (2022-05-10),
6. 11127693 - Barrier for power metallization in semiconductor devices (2021-09-21),
7. 10978418 - Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer (2021-04-13),
8. 10607972 - Semiconductor devices for integration with light emitting chips and modules thereof (2020-03-31),
9. 10461056 - Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact (2019-10-29),
10. 10049994 - Contact pads with sidewall spacers and method of making contact pads with sidewall spacers (2018-08-14),
11. 9966368 - Semiconductor devices for integration with light emitting chips and modules thereof (2018-05-08),
12. 9875978 - Semiconductor chip device (2018-01-23),
13. 9704839 - Semiconductor devices for integration with light emitting chips and modules thereof (2017-07-11),
14. 9502248 - Methods for making a semiconductor chip device (2016-11-22),
15. 9362216 - Conductive pads and methods of formation thereof (2016-06-07),

Title: Johann Gatterbauer - Innovative Inventor from Parsberg

Introduction: Johann Gatterbauer is a renowned inventor hailing from Parsberg, Germany, known for his groundbreaking contributions to various fields of technology and engineering.

Latest Patents: Johann Gatterbauer holds several patents in the areas of renewable energy, sustainable agriculture, and advanced materials, showcasing his versatility and forward-thinking approach to innovation.

Career Highlights: With a career spanning over two decades, Johann Gatterbauer has worked with leading research institutions and universities to develop cutting-edge solutions that have had a significant impact on the industry.

Collaborations: Throughout his career, Johann Gatterbauer has collaborated with top companies, innovative startups, and talented individuals to bring his ideas to life and push the boundaries of what is possible in the world of inventions.

Conclusion: Johann Gatterbauer's passion for innovation and his relentless pursuit of excellence have solidified his reputation as a visionary inventor, inspiring the next generation of innovators to think outside the box and create a better future for all.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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