logo

For the Inventor, By the Inventor

Hsinchu, Taiwan

Jean-Pierre Colinge

This inventor holds 139 USPTO granted patents and 1 published patent application, primarily in Semiconductor Technology (CPC class H01L29-775). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2014-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jean-Pierre Colinge. Retrieved from https://idiyas.com/inventor/jean-pierre-colinge

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 139 

% Patents Active = 77.7

Average Co-Inventor Count = 2.7

ph-index = 17

Forward Citations = 3,720(Granted Patents)

Forward Citations (Not Self Cited) = 3,490(Dec 10, 2025)


Inventors with similar research interests:

🔬 See more inventors

Location History:

  • Blot l'Eglise, FR (2022 - 2023)
  • Belgium, FR (2023)
  • Hsinchu, TW (2014 - 2024)

Company Filing History:

goldMedal139 out of 42,926 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2014-2024

Loading Chart...
Areas of Expertise:
Transistor Formation
Silicon Nanowires
3D Integration
FinFET Devices
Non-volatile Memory
Contact Resistance
Silicide Structures
Vertical Nanowires
SRAM Cells
Semimetal Materials
Semiconductor Columns
139 patents (USPTO):Explore Patents
1. 11990532 - Method of forming transistor (2024-05-21),
2. 11854905 - Silicon and silicon germanium nanowire formation (2023-12-26),
3. 11777009 - Contacts for highly scaled transistors (2023-10-03),
4. 11557532 - Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure (2023-01-17),
5. 11532727 - Method of forming transistor (2022-12-20),
6. 11532705 - 3D cross-bar nonvolatile memory (2022-12-20),
7. 11404325 - Silicon and silicon germanium nanowire formation (2022-08-02),
8. 11302804 - Devices having a semiconductor material that is semimetal in bulk and methods of forming the same (2022-04-12),
9. 11276763 - Contacts for highly scaled transistors (2022-03-15),
10. 11239084 - Semiconductor device and manufacturing method thereof (2022-02-01),
11. 11133404 - FinFET device including a stem region of a fin element (2021-09-28),
12. 11127734 - Vertical nanowire transistor for input/output structure (2021-09-21),
13. 11104573 - Semiconductor arrangement with one or more semiconductor columns (2021-08-31),
14. 11043597 - Method for reducing contact resistance in semiconductor structures (2021-06-22),
15. 11038052 - Semiconductor arrangement with one or more semiconductor columns (2021-06-15),

Title: The Innovative Journey of Jean-Pierre Colinge

Introduction: Jean-Pierre Colinge, a pioneering inventor based in Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking inventions and patents.

Latest Patents: Jean-Pierre Colinge's latest patents showcase his continued commitment to innovation in the tech industry, with a focus on semiconductor devices and nanotechnology.

Career Highlights: With a distinguished career spanning decades, Jean-Pierre Colinge has held key roles in leading research institutions and tech companies, where he has spearheaded cutting-edge projects and developments in the semiconductor industry.

Collaborations: Throughout his career, Jean-Pierre Colinge has collaborated with top researchers, engineers, and industry experts to push the boundaries of technological advancements, resulting in the creation of revolutionary products and solutions.

Conclusion: Jean-Pierre Colinge's relentless pursuit of innovation and his passion for pushing the limits of technology have solidified his reputation as a visionary inventor in the field of semiconductor devices and nanotechnology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…