logo

For the Inventor, By the Inventor

San Jose, CA, United States of America

Hong-Yan Chen

LinkedIn

This inventor holds 47 USPTO granted patents and 9 published patent applications and 8 EPO patents, primarily in Memory Devices. Top assignees: Sandisk Technologies Inc., Micron Technology Incorporated. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hong-Yan Chen. Retrieved from https://idiyas.com/inventor/hong-yan-chen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 47 

% Patents Active = 93.6

 

Average Co-Inventor Count = 2.6

ph-index = 13

Forward Citations = 528(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (2015 - 2018)
  • San Jose, CA (US) (2016 - 2024)

Company Filing History:

goldMedal33 out of 4,955 
 
Sandisk Technologies Inc.
 patents
silverMedal14 out of 39,222 
 
Micron Technology Incorporated
 patents

Years Active: 2015-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Memory Devices
Read Disturb
Program Verify
Sub-Block Erase
Injection Disturb
Non-Volatile Memory
Hot Electron Injection
Channel Discharge
Word Line Programming
Data Retention
Erase Operations
47 patents (USPTO):Explore Patents
1. 12706141 - Erase operation with electron injection for reduction of cell-to-cell interference in a memory sub-system (2026-08-11),
2. 12592290 - Memory devices with program verify levels based on compensation values (2026-03-31),
3. 12462875 - Program scheme for edge data wordlines in a memory device (2025-11-04),
4. 12437818 - Corrective program verify operation with improved read window budget retention (2025-10-07),
5. 12211548 - Erase operation with electron injection for reduction of cell-to-cell interference in a memory sub-system (2025-01-28),
6. 12068037 - Managing sub-block erase operations in a memory sub-system (2024-08-20),
7. 11894069 - Unselected sub-block source line and bit line pre-charging to reduce read disturb (2024-02-06),
8. 11749359 - Short program verify recovery with reduced programming disturbance in a memory sub-system (2023-09-05),
9. 11749353 - Managing sub-block erase operations in a memory sub-system (2023-09-05),
10. 11688471 - Short program verify recovery with reduced programming disturbance in a memory sub-system (2023-06-27),
11. 11670372 - Pre-boosting scheme during a program operation in a memory sub-system (2023-06-06),
12. 11335412 - Managing sub-block erase operations in a memory sub-system (2022-05-17),
13. 11282582 - Short program verify recovery with reduced programming disturbance in a memory sub-system (2022-03-22),
14. 11183245 - Pre-boosting scheme during a program operation in a memory sub-system (2021-11-23),
15. 10811110 - Method of reducing injection type of program disturb during program pre-charge in memory device (2020-10-20),

Title: Inventor Hong-Yan Chen: Revolutionizing Technology in San Jose

Introduction: Hong-Yan Chen is a visionary inventor based in San Jose, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Hong-Yan Chen holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a career spanning over two decades, Hong-Yan Chen has worked with leading tech companies in Silicon Valley, spearheading projects that have pushed the boundaries of technological advancement.

Collaborations: Throughout his career, Hong-Yan Chen has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and creativity in the projects he undertakes.

Conclusion: Hong-Yan Chen's relentless pursuit of innovation and his passion for technology continue to inspire the next generation of inventors and shape the future of the tech industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…