The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Oct. 27, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Hong-Yan Chen, San Jose, CA (US);

Yingda Dong, Los Altos, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 16/08 (2006.01); G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 16/08 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/3459 (2013.01); G11C 11/5621 (2013.01); G11C 11/5671 (2013.01);
Abstract

Control logic in a memory device initiates, subsequent to a program verify phase of a program operation, a new program operation on the memory array, the new program operation comprising a pre-boosting phase occurring prior to a program phase. The control logic causing one or more positive pre-boosting voltages to be applied to corresponding subsets of a plurality of word lines of a block of the memory array during the pre-boosting phase and causes the one or more positive pre-boosting voltages to be ramped down to a ground voltage during the pre-boosting phase in a designated order based on a location of the corresponding subsets of the plurality of word lines to which the one or more positive pre-boosting voltages were applied.


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