Company Filing History:

5 out of 2,490

Synopsys, Inc.

4. 1 out of 832,843

Other

patents

Years Active: 2002-2025

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12 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12333227 - Machine-learning-based design-for-test (DFT) recommendation system for improving automatic test pattern generation (ATPG) quality of results (QoR) (2025-06-17),

2. 12282063 - Scan chain formation for improving chain resolution (2025-04-21),

3. 11842134 - Automated determinaton of failure mode distribution (2023-12-12),

4. 11829692 - Machine-learning-based design-for-test (DFT) recommendation system for improving automatic test pattern generation (ATPG) quality of results (QOR) (2023-11-28),

5. 11288428 - Integrated circuit design modification for localization of scan chain defects (2022-03-29),

6. 8788993 - Computer system for generating an integrated and unified view of IP-cores for hierarchical analysis of a system on chip (SoC) design (2014-07-22),

7. 8533647 - Method for generating an integrated and unified view of IP-cores for hierarchical analysis of a system on chip (SoC) design (2013-09-10),

8. 7424656 - Clocking methodology for at-speed testing of scan circuits with synchronous clocks (2008-09-09),

9. 7191374 - Method of and program product for performing gate-level diagnosis of failing vectors (2007-03-13),

10. 6883134 - Method and program product for detecting bus conflict and floating bus conditions in circuit designs (2005-04-19),

11. 6510534 - Method and apparatus for testing high performance circuits (2003-01-21),

12. 6457161 - Method and program product for modeling circuits with latch based design (2002-09-24),

Title: The Innovative Mind of Fadi Maamari: Pioneering Success in Circuit Design

Introduction: Fadi Maamari, an accomplished inventor based in San Jose, California, has made significant contributions to the field of circuit design and testing. With a remarkable portfolio of 10 patents, Maamari's work focuses on advancing techniques in automated failure mode distribution and machine-learning-based design-for-test systems. His innovative approaches are shaping the future of integrated circuit design and testing protocols.

Latest Patents: Among Maamari's latest patents is a groundbreaking method titled "Automated Determination of Failure Mode Distribution." This method traces from an observation point in a circuit to produce a cone of influence that encompasses various components connected at multiple nodes. By determining an observability probability for each node, along with a weighted soft error probability for each logic element, the method establishes a comprehensive failure mode distribution for the entire circuit. Another notable patent is the "Machine-learning-based Design-for-Test (DFT) Recommendation System for Improving Automatic Test Pattern Generation (ATPG) Quality of Results (QOR)." This innovative approach utilizes machine learning to analyze training data collected from integrated circuit designs, leading to predictions of ranked test-case configurations that enhance test coverage.

Career Highlights: Fadi has held positions at notable companies, including LogicVision, Inc. and Synopsys, Inc. His roles in these organizations have enabled him to refine his expertise and drive forward innovative projects impacting the circuit design industry positively.

Collaborations: Throughout his career, Maamari has collaborated with prominent professionals such as Benoit Nadeau-Dostie and Dwayne M. Burek. These collaborations have fostered the exchange of ideas and techniques, further enriching Maamari's inventive processes and contributions to the field.

Conclusion: Fadi Maamari's innovative spirit and technical prowess have paved the way for advances in circuit design and testing methodologies. With numerous patents to his name, he continues to push the boundaries of what is possible in the realm of integrated circuits, influencing future developments and inspiring the next generation of inventors.

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