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For the Inventor, By the Inventor

Taichung, Taiwan

ChaoChieh Tsai

USPTO Granted Patents = 15

Average Co-Inventor Count = 2.3

ph-index = 10

Forward Citations = 496(Granted Patents)


Company Filing History:

goldMedal15 out of 40,739 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 1997-2001

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15 patents (USPTO):Explore Patents
1. 6245639 - Method to reduce a reverse narrow channel effect for MOSFET devices (2001-06-12),
2. 6232164 - Process of making CMOS device structure having an anti-SCE block implant (2001-05-15),
3. 6175125 - Semiconductor structure for testing vias interconnecting layers of the structure (2001-01-16),
4. 6171913 - Process for manufacturing a single asymmetric pocket implant (2001-01-09),
5. 6121139 - Ti-rich TiN insertion layer for suppression of bridging during a (2000-09-19),
6. 6037204 - Silicon and arsenic double implanted pre-amorphization process for (2000-03-14),
7. 6030863 - Germanium and arsenic double implanted pre-amorphization process for (2000-02-29),
8. 6022775 - High effective area capacitor for high density DRAM circuits using (2000-02-08),
9. 5895257 - LOCOS field oxide and field oxide process using silicon nitride spacers (1999-04-20),
10. 5821153 - Method to reduce field oxide loss from etches (1998-10-13),
11. 5757045 - CMOS device structure with reduced risk of salicide bridging and reduced (1998-05-26),
12. 5702972 - Method of fabricating MOSFET devices (1997-12-30),
13. 5691212 - MOS device structure and integration method (1997-11-25),
14. 5674775 - Isolation trench with a rounded top edge using an etch buffer layer (1997-10-07),
15. 5668024 - CMOS device structure with reduced risk of salicide bridging and reduced (1997-09-16),

Title: ChaoChieh Tsai: Innovator in Semiconductor Technology

Introduction

ChaoChieh Tsai is a prominent inventor based in Taichung, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 15 patents. His work focuses on improving the performance and efficiency of MOSFET devices, which are crucial components in modern electronics.

Latest Patents

One of his latest patents is a method to reduce a reverse narrow channel effect for MOSFET devices. This innovative process involves fabricating a narrow channel width MOSFET device with a reduced reverse narrow channel effect (RNCE). The technique utilizes a large angle nitrogen ion implantation procedure to enhance the interface between the channel region and the shallow trench, effectively reducing dopant depletion. Another notable patent is the process of making a CMOS device structure having an anti-SCE block implant. This method fabricates a CMOS device with an anti-SCE block region below the channel region and a metal gate, utilizing a masking layer to define the implant and gate structure.

Career Highlights

ChaoChieh Tsai is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work has been instrumental in advancing the technology used in CMOS and MOSFET devices, contributing to the overall efficiency and performance of electronic components.

Collaborations

He has collaborated with notable coworkers such as Shun-Liang Hsu and Shou-Zen Chang, further enhancing the innovative efforts within his team.

Conclusion

ChaoChieh Tsai's contributions to semiconductor technology through his patents and work at Taiwan Semiconductor Manufacturing Company Limited highlight his role as a key innovator in the field. His advancements continue to shape the future of electronic devices.

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