The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 1997
Filed:
Jan. 27, 1997
Taiwan Semiconductor Manufacturing Company Ltd., Hsin-Chu, TW;
Abstract
A method for improving the source/drain resistance in the fabrication of an integrated circuit device is described. Gate electrodes are formed on the surface of a semiconductor substrate. Lightly doped regions are implanted into the semiconductor substrate using the gate electrodes as a mask. First spacers are formed on the sidewalls of the gate electrodes. Second spacers are formed on the sidewalls of the first spacers. Heavily doped source and drain regions are implanted into the semiconductor substrate using the gate electrodes and first and second spacers as a mask. Thereafter, the second spacers are removed. A titanium layer is deposited by chemical vapor deposition over the substrate whereby titanium silicide is formed overlying the gate electrodes and overlying the source and drain regions and whereby elemental titanium is deposited overlying the first spacers wherein the titanium silicide overlying the source and drain regions improves the source/drain resistance. The elemental titanium is removed. The substrate is annealed to transform all of the silicide into C54-phase TiSi.sub.2 and the fabrication of the integrated circuit device is completed.