An L Steegen

This inventor holds 26 USPTO granted patents, primarily in CMOS Device Technology. Top assignee: International Business Machines Corporation. Active years: 2005-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: An L Steegen. Retrieved from https://idiyas.com/inventor/an-l-steegen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 26

% Patents Active = 38.5

Average Co-Inventor Count = 4.8

ph-index = 9

Forward Citations = 537(Granted Patents)

Location History:

Stanford, CT (US) (2005 - 2010)
Stamford, CT (US) (2005 - 2011)
Hopewell Junction, NY (US) (2011)

Company Filing History:

26 out of 166,524

International Business Machines Corporation

patents

Years Active: 2005-2011

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Areas of Expertise:

Strained Silicon

CMOS Devices

Silicide Integration

Selective SOI

FET Gate Structures

Dual Salicide

SRAM Cells

Lattice-Mismatched Regions

Metal Replacement Gate

Passivation

Advanced CMOS

Silicide Contacts

26 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7928443 - Method and structure for forming strained SI for CMOS devices (2011-04-19),

2. 7923786 - Selective silicon-on-insulator isolation structure and method (2011-04-12),

3. 7700951 - Method and structure for forming strained Si for CMOS devices (2010-04-20),

4. 7655557 - CMOS silicide metal gate integration (2010-02-02),

5. 7550338 - Method and structure for forming strained SI for CMOS devices (2009-06-23),

6. 7429752 - Method and structure for forming strained SI for CMOS devices (2008-09-30),

7. 7411227 - CMOS silicide metal gate integration (2008-08-12),

8. 7396714 - Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions (2008-07-08),

9. 7326983 - Selective silicon-on-insulator isolation structure and method (2008-02-05),

10. 7326610 - Process options of forming silicided metal gates for advanced CMOS devices (2008-02-05),

11. 7291528 - Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions (2007-11-06),

12. 7129126 - Method and structure for forming strained Si for CMOS devices (2006-10-31),

13. 7112481 - Method for forming self-aligned dual salicide in CMOS technologies (2006-09-26),

14. 7081397 - Trench sidewall passivation for lateral RIE in a selective silicon-on-insulator process flow (2006-07-25),

15. 7067368 - Method for forming self-aligned dual salicide in CMOS technologies (2006-06-27),

Title: An L Steegen: Innovator in Semiconductor Technology

Introduction

An L Steegen is a prominent inventor based in Stamford, CT, known for his significant contributions to the field of semiconductor technology. With a remarkable portfolio of 26 patents, he has made a notable impact on advancements in integrated circuit design and manufacturing processes. His work has facilitated innovations that enhance the efficiency and performance of semiconductor devices.

Latest Patents

One of Steegen's latest patents is titled "Method and structure for forming strained SI for CMOS devices." This invention details a semiconductor device which includes a substrate possessing at least one gap extending beneath a portion of the substrate, alongside a gate stack placed on top. The strain layer within the device is strategically situated under either the source region or the drain region to improve device performance.

Another recent achievement is the patent for a "Selective silicon-on-insulator isolation structure and method." This method outlines the construction of an isolation structure, beginning with the provision of a semiconductor substrate. The process involves the formation of a buried N-doped region and a vertical trench that communicates with a lateral trench, ultimately enhancing the device's insulation properties.

Career Highlights

An L Steegen currently contributes his expertise at the International Business Machines Corporation (IBM), one of the leading technology companies globally. His innovative approaches have not only garnered multiple patents but have also driven progress in semiconductor applications critical to modern electronics.

Collaborations

Throughout his career, Steegen has collaborated with other skilled professionals, including Cyril Cabral, Jr. and Ying Di Zhang. These partnerships have played a vital role in advancing research and development initiatives, culminating in a range of patented technologies that benefit the industry.

Conclusion

In summary, An L Steegen stands out as a leading inventor whose contributions shape the semiconductor landscape. His inventive designs and methodologies continue to inspire innovations in technology, ensuring that the devices we rely on become increasingly efficient and powerful. With a robust patent portfolio and fruitful collaborations, Steegen's work is a testament to the enduring impact of innovative thinking in engineering.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]