Adam Brand

USPTO Granted Patents = 20 (Patent Applications = 7)

Average Co-Inventor Count = 4.5

ph-index = 4

Forward Citations = 72(Granted Patents)

Location History:

Sunnyvale, CA (US) (2018)
Palto Alto, CA (US) (2018)
Palo Alto, CA (US) (2014 - 2024)

Company Filing History:

8 out of 13,684

Applied Materials, Inc.

patents

7 out of 916

Varian Semiconductor Equipment Associates, Inc.

patents

4 out of 1,284

Maxim Integrated Products, Inc.

patents

4. 1 out of 15,458

University of California

patents

Years Active: 2014-2024

where 'Filed Patents' based on already Granted Patents

20 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 11908691 - Techniques to engineer nanoscale patterned features using ions (2024-02-20),

2. 11699753 - LDMOS transistors including vertical gates with multiple dielectric sections, and associated methods (2023-07-11),

3. 11488823 - Techniques to engineer nanoscale patterned features using ions (2022-11-01),

4. 11316044 - LDMOS transistors including vertical gates with multiple dielectric sections, and associated methods (2022-04-26),

5. 11043380 - Techniques to engineer nanoscale patterned features using ions (2021-06-22),

6. 10971368 - Techniques for processing substrates using directional reactive ion etching (2021-04-06),

7. 10622452 - Transistors with dual gate conductors, and associated methods (2020-04-14),

8. 10573744 - Self-aligned, dual-gate LDMOS transistors and associated methods (2020-02-25),

9. 10134585 - Low temperature atomic layer deposition of oxides on compound semiconductors (2018-11-20),

10. 10109534 - Multi-threshold voltage (Vt) workfunction metal by selective atomic layer deposition (ALD) (2018-10-23),

11. 10008384 - Techniques to engineer nanoscale patterned features using ions (2018-06-26),

12. 9934981 - Techniques for processing substrates using directional reactive ion etching (2018-04-03),

13. 9673277 - Methods and apparatus for forming horizontal gate all around device structures (2017-06-06),

14. 9378941 - Interface treatment of semiconductor surfaces with high density low energy plasma (2016-06-28),

15. 9337314 - Technique for selectively processing three dimensional device (2016-05-10),

Title: Innovator Spotlight: Adam Brand - Pioneering Inventor in Silicon Technologies.

Introduction:

Adam Brand, a distinguished inventor based in Palo Alto, California, has solidified his reputation in the field of silicon technologies with an impressive portfolio of 20 patents. His groundbreaking work at Varian Semiconductor Equipment Associates, Inc. has revolutionized the industry.

Latest Patents:

Among his latest patents is a cutting-edge technique to engineer nanoscale patterned features using ions. This method allows for precise and efficient patterning of substrates, showcasing Adam Brand's innovative approach to nanotechnology. Additionally, his work on LDMOS transistors featuring vertical gates with multiple dielectric sections demonstrates his expertise in semiconductor device design.

Career Highlights:

Adam Brand's career highlights include his pivotal contributions to Varian Semiconductor Equipment Associates, Inc., where he has played a key role in developing advanced semiconductor technologies. His patents reflect his dedication to pushing the boundaries of what is possible in the realm of silicon-based devices.

Collaborations:

Collaborating closely with accomplished professionals such as John J Hautala and Simon Ruffell, Adam Brand has fostered a dynamic environment for innovation and knowledge exchange. Together, they have spearheaded projects that have reshaped the landscape of silicon technologies.

Conclusion:

In conclusion, Adam Brand stands as a driving force in the world of silicon technologies, with his inventive spirit and relentless pursuit of excellence setting him apart as a true trailblazer in the field. His patents not only showcase his technical prowess but also underscore his unwavering commitment to advancing the boundaries of innovation in semiconductor engineering.

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7 patents pending:

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