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Singapore, Singapore

Verigy (Singapore) Pte. Ltd.

Calculating rank

USPTO Granted Patents = 115

% Expired Patents = 16.5

Forward Citations = 424

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115 inventors (with patents filed for the assignee):

Jochen Rivoir (10 out of 49 patents)

Reid F Hayhow (10 out of 16 patents)

Romi Mayder (8 out of 21 patents)

4. Carli Connally (8 out of 9 patents)

5. Edmundo De La Puente (7 out of 22 patents)

6. Erik H Volkerink (7 out of 16 patents)

7. Robert Stanley Kolman (7 out of 14 patents)

8. Ajay Khoche (6 out of 134 patents)

9. Bryan F Carpenter (5 out of 5 patents)

10. Klaus-Dieter Hilliges (4 out of 10 patents)

11. Richard C Dokken (4 out of 8 patents)

12. Fu Chiung Chong (4 out of 24 patents)

13. Sammy Mok (4 out of 23 patents)

14. Phillip D Burlison (4 out of 15 patents)

15. John William Andberg (4 out of 19 patents)

Core Competencies:

Channel Switching Circuit

Test Data Processing

Scan Chain Analysis

Automated Test Equipment

High Density Interconnect

Memory Device Testing

Data Formatting

Digital to Analog Conversion

Performance Characterization

Failure Analysis

Signal Processing

115 patents: Sort by Forward Citations

1. 8149901 - Channel switching circuit (2012-04-03),

2. 8131531 - System and method for simulating a semiconductor wafer prober and a class memory test handler (2012-03-06),

3. 8127186 - Methods and apparatus for estimating a position of a stuck-at defect in a scan chain of a device under test (2012-02-28),

4. 8068537 - Communication circuit for a bi-directional data transmission (2011-11-29),

5. 8060851 - Method for operating a secure semiconductor IP server to support failure analysis (2011-11-15),

6. 8010933 - Source synchronous timing extraction, cyclization and sampling (2011-08-30),

7. 8010856 - Methods for analyzing scan chains, and for determining numbers or locations of hold time faults in scan chains (2011-08-30),

8. 8008933 - System and method for baseband calibration (2011-08-30),

9. 8006149 - System and method for device performance characterization in physical and logical domains with AC SCAN testing (2011-08-23),

10. 8005633 - Excitation signal generator for improved accuracy of model-based testing (2011-08-23),

11. 7952373 - Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies (2011-05-31),

12. 7934710 - Clamp and method for operating same (2011-05-03),

13. 7930603 - Feature-oriented test program development and execution (2011-04-19),

14. 7928755 - Methods and apparatus that selectively use or bypass a remote pin electronics block to test at least one device under test (2011-04-19),

15. 7924043 - Method and product for testing a device under test (2011-04-12),

Company Overview

Verigy (Singapore) Pte. Ltd. specializes in semiconductor testing solutions, focusing on enhancing the efficiency and accuracy of electronic device manufacturing. The company develops advanced automated test equipment and technologies that address critical aspects of semiconductor testing, including channel switching circuits, test data processing, and memory device testing. With a strong emphasis on high-density interconnect and digital to analog conversion, Verigy plays a vital role in the semiconductor industry, contributing to the development of reliable and high-performance electronic components.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

115 Patents

#33 in Singapore

#33 in Singapore

#6,902 in the World

Singapore, Singapore

Verigy (Singapore) Pte. Ltd.

Forward Citations = 424

115 inventors:

Jochen Rivoir (10 out of 49 patents)

Reid F Hayhow (10 out of 16 patents)

Romi Mayder (8 out of 21 patents)

4. Carli Connally (8 out of 9 patents)

5. Edmundo De La Puente (7 out of 22 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Verigy (Singapore) Pte. Ltd.. Retrieved from https://idiyas.com/company/verigy-singapore

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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