The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2011
Filed:
Mar. 31, 2008
Stephen A. Cannon, Fremont, CA (US);
Richard C. Dokken, San Ramon, CA (US);
Alfred L. Crouch, Cedar Park, TX (US);
Gary A. Winblad, Dublin, CA (US);
Stephen A. Cannon, Fremont, CA (US);
Richard C. Dokken, San Ramon, CA (US);
Alfred L. Crouch, Cedar Park, TX (US);
Gary A. Winblad, Dublin, CA (US);
Verigy (Singapore) Pte. Ltd., Singapore, SG;
Abstract
In a method for determining a number of possible hold time faults in a scan chain of a DUT, an environmental variable of the scan chain is set to a value believed to cause a hold time fault in the scan chain, and then a pattern is shifted through the scan chain. The pattern has a background pattern of at least n contiguous bits of a first logic state, followed by at least one bit of a second logic state, where n is a length of the scan chain. The number of possible hold time faults in the scan chain can be determined as a difference between i) a clock cycle when the at least one bit is expected to cause a transition at an output of the scan chain, and ii) a clock cycle when the at least one bit actually causes a transition at the output of the scan chain. If a value of the environmental variable at which the scan chain operates correctly can be determined, the location of one or more hold time faults can also be determined.