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Fremont, CA, United States of America

Spin Memory, Inc.

USPTO Granted Patents = 146

Trademarks = 3

Forward Citations = 371

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51 inventors (with patents filed for the assignee):

Mustafa Pinarbasi (36 out of 251 patents)

Kuk-Hwan Kim (33 out of 62 patents)

Marcin Gajek (31 out of 42 patents)

4. Neal Berger (30 out of 72 patents)

5. Benjamin S Louie (27 out of 131 patents)

6. Amitay Levi (26 out of 63 patents)

7. Dafna Beery (24 out of 41 patents)

8. Bartlomiej Adam Kardasz (24 out of 40 patents)

9. Michail Tzoufras (24 out of 34 patents)

10. Kadriye Deniz Bozdag (24 out of 29 patents)

11. Andrew J Walker (19 out of 97 patents)

12. Lester Crudele (19 out of 25 patents)

13. Eric Ryan (17 out of 20 patents)

14. Mourad El Baraji (16 out of 34 patents)

15. Jorge Vasquez (15 out of 24 patents)

Core Competencies:

MRAM

Magnetic Tunnel Junction

Error Cache

Spin-Orbit Torque

Memory Array

Magnetic Anisotropy

Noise Mitigation

Three-Dimensional Arrays

Retention Improvement

Dynamic Redundancy

Thermal Stability

High Density

146 patents: Sort by Forward Citations

1. 11119936 - Error cache system with coarse and fine segments for power optimization (2021-09-14),

2. 11119910 - Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments (2021-09-14),

3. 11107979 - Patterned silicide structures and methods of manufacture (2021-08-31),

4. 11107978 - Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer (2021-08-31),

5. 11107974 - Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer (2021-08-31),

6. 11094359 - High retention multi-level-series magnetic random-access memory (2021-08-17),

7. 11048633 - Determining an inactive memory bank during an idle memory cycle to prevent error cache overflow (2021-06-29),

8. 11010294 - MRAM noise mitigation for write operations with simultaneous background operations (2021-05-18),

9. 10991410 - Bi-polar write scheme (2021-04-27),

10. 10990465 - MRAM noise mitigation for background operations by delaying verify timing (2021-04-27),

11. 10983883 - Error recovery in magnetic random access memory after reflow soldering (2021-04-20),

12. 10971681 - Method for manufacturing a data recording system utilizing heterogeneous magnetic tunnel junction types in a single chip (2021-04-06),

13. 10971680 - Multi terminal device stack formation methods (2021-04-06),

14. 10971245 - Measurement of MTJ in a compact memory array (2021-04-06),

15. 10962590 - Magnet mounting apparatus for MTJ device testers (2021-03-30),

Company Overview

Spin Memory, Inc., based in Fremont, CA, specializes in advanced magnetic memory technologies, focusing on Magnetoresistive Random Access Memory (MRAM). The company is at the forefront of developing innovative solutions utilizing Magnetic Tunnel Junctions and Spin-Orbit Torque mechanisms, aimed at enhancing memory performance and efficiency. Their research encompasses critical areas such as error cache management, noise mitigation, and the design of three-dimensional memory arrays, positioning them as a leader in the evolving landscape of memory technology.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

146 Patents

#22 in Fremont, CA

#592 in California

#2,682 in US

#5,581 in the World

Fremont, CA, United States of America

Spin Memory, Inc.

Forward Citations = 371

51 inventors:

Mustafa Pinarbasi (36 out of 251 patents)

Kuk-Hwan Kim (33 out of 62 patents)

Marcin Gajek (31 out of 42 patents)

4. Neal Berger (30 out of 72 patents)

5. Benjamin S Louie (27 out of 131 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Spin Memory, Inc.. Retrieved from https://idiyas.com/company/spin-memory

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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