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Hsinchu, Taiwan

Phoenix Precision Technology Corporation

USPTO Granted Patents = 95

% Expired Patents = 23.2

Forward Citations = 1,378

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49 inventors (with patents filed for the assignee):

Shih-Ping Hsu (57 out of 164 patents)

Chao-Wen Shih (7 out of 137 patents)

Wen-Hung Hu (7 out of 11 patents)

4. Kan-Jung Chia (7 out of 17 patents)

5. Chung-Cheng Lien (6 out of 8 patents)

6. Lin-Yin Wong (6 out of 8 patents)

7. Ying-Tung Wang (6 out of 6 patents)

8. Chu-Chin Hu (5 out of 23 patents)

9. Sao-Hsia Tang (5 out of 5 patents)

10. I-Chung Tung (5 out of 6 patents)

11. Chia-Wei Chang (4 out of 46 patents)

12. Kun-Chen Tsai (4 out of 8 patents)

13. Zao-Kuo Lai (4 out of 5 patents)

14. Bo-Wei Chen (3 out of 16 patents)

15. Shang-Wei Chen (3 out of 15 patents)

Core Competencies:

Coreless Substrate

Embedded Chips

Circuit Board Structure

Semiconductor Package

Conductive Bump

Heat-Dissipating Structure

Multi-Layer Circuit Board

Optoelectronic Components

Direct Electrical Connection

Thermally Enhanced Device

Electrical Connector

Capacitor Array

95 patents: Sort by Forward Citations

1. 8058723 - Package structure in which coreless substrate has direct electrical connections to semiconductor chip and manufacturing method thereof (2011-11-15),

2. 7768119 - Carrier structure embedded with semiconductor chip (2010-08-03),

3. 7763969 - Structure with semiconductor chips embeded therein (2010-07-27),

4. 7754598 - Method for manufacturing coreless packaging substrate (2010-07-13),

5. 7754538 - Packaging substrate structure with electronic components embedded therein and method for manufacturing the same (2010-07-13),

6. 7719853 - Electrically connecting terminal structure of circuit board and manufacturing method thereof (2010-05-18),

7. 7719104 - Circuit board structure with embedded semiconductor chip and method for fabricating the same (2010-05-18),

8. 7718470 - Package substrate and method for fabricating the same (2010-05-18),

9. 7706148 - Stack structure of circuit boards embedded with semiconductor chips (2010-04-27),

10. 7705471 - Conductive bump structure of circuit board and method for forming the same (2010-04-27),

11. 7705456 - Semiconductor package substrate (2010-04-27),

12. 7705446 - Package structure having semiconductor chip embedded therein and method for fabricating the same (2010-04-27),

13. 7674986 - Circuit board structure having capacitor array and embedded electronic component and method for fabricating the same (2010-03-09),

14. 7674362 - Method for fabrication of a conductive bump structure of a circuit board (2010-03-09),

15. 7659193 - Conductive structures for electrically conductive pads of circuit board and fabrication method thereof (2010-02-09),

Company Overview

Phoenix Precision Technology Corporation, based in Hsinchu, Taiwan, specializes in semiconductor packaging technologies. The company focuses on innovative solutions such as coreless substrates, embedded chips, and advanced circuit board structures. Their expertise extends to the development of semiconductor packages, conductive bumps, and heat-dissipating structures, catering to the evolving needs of the semiconductor industry. Additionally, Phoenix Precision is involved in multi-layer circuit board technologies and optoelectronic components, positioning itself as a key player in the semiconductor packaging landscape.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

95 Patents

#67 in Hsinchu

#249 in Taiwan

#8,099 in the World

Hsinchu, Taiwan

Phoenix Precision Technology Corporation

Forward Citations = 1,378

49 inventors:

Shih-Ping Hsu (57 out of 164 patents)

Chao-Wen Shih (7 out of 137 patents)

Wen-Hung Hu (7 out of 11 patents)

4. Kan-Jung Chia (7 out of 17 patents)

5. Chung-Cheng Lien (6 out of 8 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Phoenix Precision Technology Corporation. Retrieved from https://idiyas.com/company/phoenix-precision-technology

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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