For the Inventor, By the Inventor

Enter assignee name

San Jose, CA, United States of America

Avogy, Inc.

USPTO Granted Patents = 76

% Expired Patents = 1.3

Forward Citations = 180

Loading Chart...

Loading Chart...

26 inventors (with patents filed for the assignee):

Isik C Kizilyalli (58 out of 82 patents)

Hui Nie (56 out of 67 patents)

Andrew Paul Edwards (44 out of 46 patents)

4. Richard J Brown (43 out of 44 patents)

5. David P Bour (38 out of 151 patents)

6. Linda T Romano (36 out of 120 patents)

7. Thomas R Prunty (35 out of 40 patents)

8. Donald Ray Disney (28 out of 169 patents)

9. Madhan M Raj (9 out of 10 patents)

10. Dave P Bour (6 out of 10 patents)

11. Hemal N Shah (6 out of 7 patents)

12. Brian Joel Alvarez (5 out of 6 patents)

13. Mahdan Raj (5 out of 5 patents)

14. Ozgur Aktas (3 out of 30 patents)

15. Quentin Diduck (3 out of 16 patents)

Core Competencies:

Gallium Nitride

JFET

Schottky Diode

Power Device

Merged P-I-N Diode

Regrowth

Doping Control

Vertical Transistor

Edge Termination

Field Effect Transistor

Superjunction

Defect Density

76 patents: Sort by Forward Citations

1. 9531256 - AC-DC converter with adjustable output (2016-12-27),

2. 9525039 - Method of fabricating a merged P-N junction and schottky diode with regrown gallium nitride layer (2016-12-20),

3. 9508838 - InGaN ohmic source contacts for vertical power devices (2016-11-29),

4. 9502544 - Method and system for planar regrowth in GaN electronic devices (2016-11-22),

5. 9484470 - Method of fabricating a GaN P-i-N diode using implantation (2016-11-01),

6. 9472684 - Lateral GaN JFET with vertical drift region (2016-10-18),

7. 9450112 - GaN-based Schottky barrier diode with algan surface layer (2016-09-20),

8. D762573 - Power supply (2016-08-02),

9. 9397186 - Method of fabricating a gallium nitride merged P-I-N schottky (MPS) diode by regrowth and etch back (2016-07-19),

10. 9391179 - Vertical GaN JFET with low gate-drain capacitance and high gate-source capacitance (2016-07-12),

11. 9369059 - AC-DC converter for wide range output voltage and high switching frequency (2016-06-14),

12. 9368582 - High power gallium nitride electronics using miscut substrates (2016-06-14),

13. 9330918 - Edge termination by ion implantation in gallium nitride (2016-05-03),

14. 9324844 - Method and system for a GaN vertical JFET utilizing a regrown channel (2016-04-26),

15. 9324809 - Method and system for interleaved boost converter with co-packaged gallium nitride power devices (2016-04-26),

Company Overview

Avogy, Inc., based in San Jose, CA, specializes in the development of advanced gallium nitride (GaN) electronics. The company focuses on innovative power devices, leveraging technologies such as JFETs, Schottky diodes, and merged P-I-N diodes to enhance performance and efficiency in electronic applications. Avogy's expertise in regrowth and doping control positions it at the forefront of the semiconductor industry, aiming to deliver cutting-edge solutions for various sectors, including consumer electronics and renewable energy.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

76 Patents

#143 in San Jose, CA

#1,132 in California

#4,846 in US

#9,898 in the World

San Jose, CA, United States of America

Avogy, Inc.

Forward Citations = 180

26 inventors:

Isik C Kizilyalli (58 out of 82 patents)

Hui Nie (56 out of 67 patents)

Andrew Paul Edwards (44 out of 46 patents)

4. Richard J Brown (43 out of 44 patents)

5. David P Bour (38 out of 151 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Avogy, Inc.. Retrieved from https://idiyas.com/company/avogy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

Loading…