For the Inventor, By the Inventor

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Los Gatos, CA, United States of America

Atomera Incorporated

USPTO Granted Patents = 113

EPO Patents = 26

Trademarks = 3

Forward Citations = 3,036

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21 inventors (with patents filed for the assignee):

Robert J Mears (56 out of 93 patents)

Hideki Takeuchi (56 out of 60 patents)

Marek Hytha (47 out of 70 patents)

4. Nyles Wynn Cody (36 out of 51 patents)

5. Richard Burton (33 out of 40 patents)

6. Keith Doran Weeks (28 out of 44 patents)

7. Robert John Stephenson (25 out of 41 patents)

8. Daniel J Connelly (13 out of 53 patents)

9. Yi-Ann Chen (12 out of 13 patents)

10. Abid Husain (9 out of 10 patents)

11. Yung-Hsuan Yang (7 out of 7 patents)

12. Erwin Trautmann (6 out of 7 patents)

13. Richard Stephen Roy (6 out of 61 patents)

14. Dmitri Choutov (5 out of 8 patents)

15. Kalipatnam Vivek Rao (3 out of 12 patents)

Core Competencies:

Superlattice

Semiconductor

Bipolar Junction Transistors

RF Devices

Gate-All-Around

FINFET

Image Sensors

Contact Resistance

Memory Devices

Nanostructure Transistors

Defect Densities

Vertical Integration

113 patents: Sort by Forward Citations

1. 12712011 - Dynamic Random Access Memory System Including Single-Ended Sense Amplifiers And Methods For Operating Same (2026-08-18),

2. 12707690 - Gate-all-around (GAA) device including a superlattice (2026-08-11),

3. 12635271 - Method for making image sensor devices including a superlattice (2026-05-19),

4. 12635155 - Methods for making bipolar junction transistors including emitter-base and base-collector superlattices (2026-05-19),

5. 12635122 - Multi-chip memory system including DRAM chips with integrated comparator arrays and method of operating same (2026-05-19),

6. 12575199 - Image sensor devices including a superlattice (2026-03-10),

7. 12477798 - Semiconductor device including a superlattice and enriched silicon 28 epitaxial layer (2025-11-18),

8. 12439658 - Semiconductor device including a superlattice providing metal work function tuning (2025-10-07),

9. 12439618 - Bipolar junction transistors including emitter-base and base-collector superlattices (2025-10-07),

10. 12417912 - Radio frequency (RF) semiconductor devices including a ground plane layer having a superlattice (2025-09-16),

11. 12382689 - Method for making DMOS devices including a superlattice and field plate for drift region diffusion (2025-08-05),

12. 12322594 - Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer (2025-06-03),

13. 12315723 - Method for making semiconductor device with selective etching of superlattice to accumulate non-semiconductor atoms (2025-05-27),

14. 12315722 - Method for making a radio frequency silicon-on-insulator (RFSOI) wafer including a superlattice (2025-05-27),

15. 12308229 - Method for making memory device including a superlattice gettering layer (2025-05-20),

Atomera Incorporated is a semiconductor materials and intellectual property licensing company. The company has developed a proprietary technology called Mears Silicon Technology (MST), which enhances the performance and power efficiency of semiconductor devices. Atomera licenses its MST technology to semiconductor manufacturers, enabling them to improve the performance and yield of their products. With its innovative solutions, Atomera aims to revolutionize the semiconductor industry and drive advancements in areas such as IoT, 5G, artificial intelligence, and more.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Sep 29 2026

Atomera Incorporated

113 Patents

#3 in Los Gatos, CA

#768 in California

#3,401 in US

#6,993 in the World

Los Gatos, CA, United States of America

Atomera Incorporated

Forward Citations = 3,036

21 inventors:

Robert J Mears (56 out of 93 patents)

Hideki Takeuchi (56 out of 60 patents)

Marek Hytha (47 out of 70 patents)

4. Nyles Wynn Cody (36 out of 51 patents)

5. Richard Burton (33 out of 40 patents)

Please report any incorrect information to [email protected]

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