The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2025
Filed:
May. 08, 2024
Atomera Incorporated, Los Gatos, CA (US);
Richard Burton, Phoenix, AZ (US);
Shuyi Li, Los Gatos, CA (US);
ATOMERA INCORPORATED, Los Gatos, CA (US);
Abstract
A method for making a double-diffused MOS (DMOS) device may include forming a semiconductor layer having a first conductivity type, forming a drift region of a second conductivity type in the semiconductor substrate, forming spaced-apart source and drain regions in the semiconductor layer, and forming a first superlattice on the semiconductor layer. The first superlattice may include a plurality of stacked groups of layers, each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a gate above the first superlattice, and a forming field plate layer adjacent the drift region and configured to deplete the drift region.