The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Mar. 29, 2023
Applicant:

Atomera Incorporated, Los Gatos, CA (US);

Inventors:

Hideki Takeuchi, San Jose, CA (US);

Yi-Ann Chen, Campbell, CA (US);

Nyles Wynn Cody, Tempe, AZ (US);

Assignee:

ATOMERA INCORPORATED, Los Gatos, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01); H10F 39/18 (2025.01);
U.S. Cl.
CPC ...
H10F 39/1825 (2025.01); H10F 39/014 (2025.01); H10F 39/024 (2025.01); H10F 39/8053 (2025.01); H10F 39/8063 (2025.01); H10F 39/807 (2025.01);
Abstract

A method for making an image sensor device may include forming a pixel region within a semiconductor substrate comprising a first dopant having a first conductivity type, forming a first pinning layer on a surface of the substrate and including a second dopant having a second conductivity type different the first conductivity type, and forming a second pinning layer in the semiconductor substrate adjacent at least one side of the pixel region and including a superlattice and the second dopant. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.


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