The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2026
Filed:
Mar. 07, 2024
Atomera Incorporated, Los Gatos, CA (US);
Hideki Takeuchi, San Jose, CA (US);
Susumu Kuwabara, Annaka City, JP;
ATOMERA INCORPORATED, Los Gatos, CA (US);
Abstract
A semiconductor processing method may include forming a superlattice layer on a donor semiconductor wafer, the superlattice including a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include performing ion implantation on the donor semiconductor wafer to create a separation layer below the superlattice layer, forming an oxide layer on a base semiconductor wafer, performing ion beam treatment on the oxide layer, bonding the donor semiconductor wafer to the base semiconductor wafer so that the superlattice layer is adjacent the oxide layer, removing portions of the donor wafer at the separation layer from the donor wafer to define an active semiconductor layer above the superlattice layer, and forming an electronic device(s) in the active layer.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile