The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2015
Filed:
Dec. 09, 2014
Tessera, Inc., San Jose, CA (US);
Hiroaki Sato, Yokohama, JP;
Teck-Gyu Kang, San Jose, CA (US);
Belgacem Haba, Saratoga, CA (US);
Philip R. Osborn, San Jose, CA (US);
Wei-Shun Wang, Palo Alto, CA (US);
Ellis Chau, San Jose, CA (US);
Ilyas Mohammed, Santa Clara, CA (US);
Norihito Masuda, Yokohama, JP;
Kazuo Sakuma, Iwaki, JP;
Kiyoaki Hashimoto, Kanagawa, JP;
Kurosawa Inetaro, Kanagawa, JP;
Tomoyuki Kikuchi, Kanagawa, JP;
Tessera, Inc., San Jose, CA (US);
Abstract
A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.