Yoichiro Tanaka

This inventor holds 13 USPTO granted patents. Top assignees: Sandisk 3D LLC, Sandisk Technologies Inc.. Active years: 2009-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yoichiro Tanaka. Retrieved from https://idiyas.com/inventor/yoichiro-tanaka-b0u0lcc1

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13

% Patents Active = 46.2

Average Co-Inventor Count = 2.0

ph-index = 4

Forward Citations = 62(Granted Patents)

Location History:

Santa Clara, CA (US) (2009 - 2012)
Nagoyashi Aichi, JP (2014 - 2015)
Nagoya, JP (2016)
Yokkaichi, JP (2017 - 2019)

Company Filing History:

Sandisk Technologies Inc.

patents

Years Active: 2009-2019

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13 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10290680 - ReRAM MIM structure formation (2019-05-14),

2. 10026782 - Implementation of VMCO area switching cell to VBL architecture (2018-07-17),

3. 9735202 - Implementation of VMCO area switching cell to VBL architecture (2017-08-15),

4. 9443910 - Silicided bit line for reversible-resistivity memory (2016-09-13),

5. 8969923 - Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning (2015-03-03),

6. 8809128 - Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning (2014-08-19),

7. 8741696 - Methods of forming pillars for memory cells using sequential sidewall patterning (2014-06-03),

8. 8679967 - Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning (2014-03-25),

9. 8193074 - Integration of damascene type diodes and conductive wires for memory device (2012-06-05),

10. 8124971 - Implementation of diffusion barrier in 3D memory (2012-02-28),

11. 8071475 - Liner for tungsten/silicon dioxide interface in memory (2011-12-06),

12. 7927977 - Method of making damascene diodes using sacrificial material (2011-04-19),

13. 7629253 - Method for implementing diffusion barrier in 3D memory (2009-12-08),

Title: Yoichiro Tanaka: Innovator in Memory Technology

Introduction

Yoichiro Tanaka is a prominent inventor based in Aichi, Japan, known for his significant contributions to memory technology. With a total of 13 patents, Tanaka has made remarkable advancements in the field of non-volatile memory systems.

Latest Patents

Tanaka's latest patents include innovative methods for improving the operation of memory arrays. One notable patent describes the formation of a ReRAM MIM structure, which enhances the performance of memory arrays by strategically arranging a Metal-Insulator-Metal (MIM) structure between a word line and an adjustable resistance bit line structure. This MIM structure can consist of a metal/ReRAM material/metal configuration, optimizing the interaction between the word line and the intrinsic polysilicon region of the bit line. Another significant patent focuses on the implementation of a Vacancy Modulated Conductive Oxide (VMCO) area switching cell to VBL architecture. This technology aims to improve the performance of non-volatile memory by utilizing a VMCO structure that includes layers of amorphous silicon and titanium oxide, allowing for enhanced switching capabilities.

Career Highlights

Throughout his career, Tanaka has worked with notable companies such as SanDisk 3D LLC and SanDisk Technologies Inc. His work has been instrumental in advancing memory technology, particularly in the development of innovative memory structures that enhance performance and efficiency.

Collaborations

Tanaka has collaborated with esteemed colleagues, including Christopher John Petti and Roy E. Scheuerlein. These collaborations have contributed to the development of cutting-edge technologies in the field of memory systems.

Conclusion

Yoichiro Tanaka's contributions to memory technology through his patents and collaborations highlight his role as a leading inventor in the industry. His innovative approaches continue to shape the future of non-volatile memory systems.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]