Taipei, Taiwan

Yi-Jen Lo

This inventor holds 24 USPTO granted patents and 14 published patent applications, primarily in Semiconductor Manufacturing. Top assignees: Nan Ya Technology Corporation, Micron Technology Incorporated, Inotera Memories, Inc.. Active years: 2008-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Jen Lo. Retrieved from https://idiyas.com/inventor/yi-jen-lo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 24 

% Patents Active = 95.8

Average Co-Inventor Count = 1.7

ph-index = 2

Forward Citations = 13(Granted Patents)


Location History:

  • Dresden, DE (2008)
  • Taipei County, TW (2011)
  • New Taipei, TW (2017 - 2024)

Company Filing History:


Years Active: 2008-2025

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Areas of Expertise:
Semiconductor Device
Hybrid Bonding
Wafer-to-Wafer
Multi-Device Package
Redistribution Layers
Stacked Chips
Thermal Management
Fabrication Method
Microelectronic Devices
TSV Interconnects
Bonding Structure
Manufacturing Method
24 patents (USPTO):Explore Patents

Title: Innovations in Semiconductor Technology: The Patents of Yi-Jen Lo

Introduction: Yi-Jen Lo is a prominent inventor based in New Taipei, Taiwan, known for his significant contributions to semiconductor technology. With a total of 19 patents to his name, Lo has played a crucial role in advancing manufacturing processes within the semiconductor industry. His innovative methodologies have sparked a new era of efficiency and effectiveness in semiconductor production.

Latest Patents: Among his latest patents is a groundbreaking method of manufacturing a semiconductor structure that features a hybrid bonding pad. This method includes providing a first semiconductor substrate where a first conductive pad is formed. Notably, the first hybrid bonding pad, crafted from nano-twins copper, is designed to be thinner than the first conductive pad, enhancing the overall performance of the semiconductor structure. Another notable patent focuses on a method for manufacturing a semiconductor device, which involves bonding two device wafers together. This technique creates a fusion-bonding interface, optimizing the integration of semiconductor devices.

Career Highlights: Yi-Jen Lo boasts an impressive career working at renowned companies such as Nan Ya Technology Corporation and Micron Technology Incorporated. His experience at these leading firms has enriched his expertise in semiconductor technologies and innovation.

Collaborations: Throughout his career, Yi-Jen Lo has collaborated with notable professionals in the field, including Shih-Fan Kuan and Hsih-Yang Chiu. These collaborations have furthered his research and development efforts, leading to cutting-edge advancements in semiconductor manufacturing processes.

Conclusion: Yi-Jen Lo's innovative approach to semiconductor technology underlines his status as a key inventor in the field. With 19 patents to his name, his work has not only advanced manufacturing techniques but also positioned him at the forefront of semiconductor innovation. As he continues to develop cutting-edge technologies, the impact of his inventions will likely resonate throughout the industry for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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