Matsumoto, Japan

Yasushi Niimura

This inventor holds 22 USPTO granted patents and 2 published patent applications and 1 EPO patent, primarily in Semiconductor Manufacturing. Top assignees: Fuji Electric Co., Ltd., Fuji Electric Device Technology Co., Ltd., Fuji Electric Systems Co. Ltd.. Active years: 2005-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasushi Niimura. Retrieved from https://idiyas.com/inventor/yasushi-niimura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 22 

% Patents Active = 72.7

 

Average Co-Inventor Count = 3.0

ph-index = 6

Forward Citations = 93(Granted Patents)


Location History:

  • Nagano, JP (2005 - 2011)
  • Matsumoto, JP (2010 - 2020)

Company Filing History:


Years Active: 2005-2020

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Areas of Expertise:
Semiconductor Device
Manufacturing Method
Device Fabrication
Assessment Method
Vertical Structure
Breakdown Voltage
High Power Device
Current Capacity
Semiconductor Apparatus
Voltage Withstanding
Element Active Portion
22 patents (USPTO):Explore Patents

Title: The Innovations of Yasushi Niimura: A Pioneer in Semiconductor Technology

Introduction: Yasushi Niimura, based in Matsumoto, Japan, is a prominent inventor with a remarkable portfolio of 22 patents. His innovations primarily focus on the assessment and manufacturing methods of semiconductor devices, contributing significantly to advancements in this field.

Latest Patents: Among his latest contributions are patents for an assessment method and semiconductor device manufacturing method aimed at simplifying the evaluation of feedback capacitance in semiconductor elements. This innovative assessment method involves acquiring two key characteristics that correlate with feedback capacitance: a first characteristic linked to the withstanding voltage of the semiconductor element and a second characteristic associated with its on-resistance. By leveraging the ratio between these two characteristics, the feedback capacitance can be effectively assessed.

Career Highlights: Yasushi has had a distinguished career, leading him to work with esteemed companies like Fuji Electric Co., Ltd. and Fuji Electric Device Technology Co., Ltd. His experience in these organizations has enriched his expertise and provided a fertile ground for his inventive pursuits.

Collaborations: Throughout his career, Yasushi has collaborated with notable colleagues such as Takeyoshi Nishimura and Masanori Inoue. These partnerships have fostered an environment of innovation and shared insights within the semiconductor technology sector.

Conclusion: Yasushi Niimura has established himself as a significant figure in the realm of semiconductor innovation. His recent patents underline his commitment to enhancing semiconductor technology through efficient assessment methods. As he continues to innovate, his contributions will undoubtedly shape the future of this vital industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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