The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2016
Filed:
Mar. 11, 2016
Fuji Electric Co., Ltd., Kawasaki-shi, JP;
Yasushi Niimura, Matsumoto, JP;
Sota Watanabe, Nagano, JP;
Hidenori Takahashi, Nagano, JP;
Takumi Fujimoto, Nagano, JP;
Takeyoshi Nishimura, Matsumoto, JP;
Takamasa Wakabayashi, Nagano, JP;
FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;
Abstract
A screen oxide film is formed on an n− drift layer () that is disposed on an anterior side of an n-type low-resistance layer (), and a nitride film is formed on the screen oxide film. The nitride film is photo-etched using a first mask and thereby, a nitride shielding film () is formed. N-type impurity ions at a concentration higher than that of the n− drift layer are implanted through the nitride shielding film () from an anterior side of a semiconductor substrate and are thermally diffused and thereby, an n counter layer () is formed. The screen oxide film is removed. A gate oxide film () is formed. A gate electrode () is formed on the gate oxide film (). P-type impurity ions are implanted from the anterior side of the semiconductor substrate using the gate electrode () and the nitride shielding film () as a mask and thereby, p− well regions () are formed. N-type impurity ions are implanted from the anterior side of the semiconductor substrate using the gate electrode () and the nitride shielding film () as a mask and thereby, n source regions () are formed.