Fremont, CA, United States of America

Venkatesh P Gopinath

This inventor holds 58 USPTO granted patents and 4 published patent applications and 5 EPO patents, primarily in Memory Devices. Top assignees: Globalfoundries U.S. Inc., Adesto Technologies Corporation, Lsi Logic Corporation. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Venkatesh P Gopinath. Retrieved from https://idiyas.com/inventor/venkatesh-p-gopinath

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 58 

% Patents Active = 89.7

 

Average Co-Inventor Count = 3.3

ph-index = 8

Forward Citations = 223(Granted Patents)

Forward Citations (Not Self Cited) = 200(Dec 10, 2025)


Location History:

  • Fremont, CA (US) (2003 - 2024)
  • Freemont, CA (US) (2024)

Company Filing History:


Years Active: 2003-2026

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Areas of Expertise:
Memory Devices
Resistive Switching
Programmable Impedance
Bipolar Junction Transistors
Non-Volatile Memory
Memory Cell Arrays
Voltage Level Shifter
Static Random Access Memory
Partitioned Memory Architecture
Field Effect Transistors
Calibration Methods
Transistor Arrays
58 patents (USPTO):Explore Patents

Title: Venkatesh P Gopinath: A Pioneer in Memory Architecture Innovations

Introduction

Venkatesh P Gopinath is a prominent inventor based in Fremont, California, known for his groundbreaking contributions to memory architecture. With a remarkable portfolio of 45 patents, Venkatesh has consistently pushed the boundaries of technology and innovation in the field of non-volatile memory devices and in-memory processing solutions.

Latest Patents

Among his latest inventions, Venkatesh's patent titled "Partitioned memory architecture with single resistor memory elements for in-memory serial processing" introduces an innovative structure for in-memory serial processing. This patent details a memory bank array where each bank contains memory elements connected to input nodes and bitlines, utilizing programmable resistors to enhance performance. The implementation of amplifiers, feedback buffers, and voltage buffers for minimal local IR drops significantly reduces processing errors.

Another significant patent is the "Non-volatile memory device with reference voltage circuit including column(s) of reference bit cells adjacent columns of memory bit cells within a memory cell array." This invention incorporates an array of non-volatile memory cells designed to include memory bit cells and at least one adjacent reference bit cell, alongside a voltage regulator and sense amplifiers to improve efficiency.

Career Highlights

Venkatesh has an impressive career, having worked for notable companies such as Adesto Technologies Corporation and LSI Logic Corporation. His experience in these organizations has sharpened his expertise in semiconductor technology and memory architecture, allowing him to make substantial advancements in the industry.

Collaborations

Throughout his career, Venkatesh has collaborated with esteemed colleagues, including Arvind Kamath and Pirooz Parvarandeh. These partnerships have fostered an environment of innovation and creativity, leading to the development of pioneering technologies and patents.

Conclusion

Venkatesh P Gopinath stands out as a visionary in the realm of memory architectures and devices. His numerous patents reflect his dedication to enhancing in-memory processing and developing cutting-edge non-volatile memory solutions. As technology continues to evolve, the contributions of inventors like Venkatesh will be instrumental in shaping the future of the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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