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For the Inventor, By the Inventor

Cambridge, MA, United States of America

Tomas Apostol Palacios

This inventor holds 24 USPTO granted patents and 7 published patent applications, primarily in Nitride Semiconductor Devices. Top assignees: Massachusetts Institute of Technology, Cambridge Electronics, Inc., International Business Machines Corporation. Active years: 2012-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tomas Apostol Palacios. Retrieved from https://idiyas.com/inventor/tomas-apostol-palacios

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24 

% Patents Active = 100.0

Average Co-Inventor Count = 2.8

ph-index = 4

Forward Citations = 94(Granted Patents)


Location History:

  • Cambridge, MA (US) (2012 - 2016)
  • Belmont, MA (US) (2016 - 2021)

Company Filing History:

goldMedal21 out of 8,578 
 
Massachusetts Institute of Technology
 patents
silverMedal2 out of 9 
 
Cambridge Electronics, Inc.
 patents
bronzeMedal1 out of 166,325 
 
International Business Machines Corporation
 patents
4. 1 out of 16,008 
 
University of California
 patents
where one patent can have more than one assignee

Years Active: 2012-2025

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Areas of Expertise:
3D Position Estimation
Tactile Signals
Optically Controlled Devices
Thermo-Mechanical Bolometer
Linear Capacitance
High-Linearity Transistors
Dielectric Structures
Current Collapse Control
Leakage Current Reduction
Two-Dimensional Heterostructures
Threshold Voltage Enhancement
Gallium Nitride Fabrication
24 patents (USPTO):Explore Patents
1. 12232864 - Systems and methods for estimating 3D position and movement from tactile signals (2025-02-25),
2. 12176454 - Optically controlled semiconductor devices (2024-12-24),
3. 12113061 - Semiconductor device with linear capacitance (2024-10-08),
4. 10914637 - Ultrasensitive thermo-mechanical bolometer (2021-02-09),
5. 10566192 - Transistor structure having buried island regions (2020-02-18),
6. 10439059 - High-linearity transistors (2019-10-08),
7. 10297456 - Dielectric structures for nitride semiconductor devices (2019-05-21),
8. 10256352 - Structures for nitride vertical transistors (2019-04-09),
9. 10217641 - Control of current collapse in thin patterned GaN (2019-02-26),
10. 9911813 - Reducing leakage current in semiconductor devices (2018-03-06),
11. 9812525 - Universal methodology to synthesize diverse two-dimensional heterostructures (2017-11-07),
12. 9711594 - Improving linearity in semiconductor devices (2017-07-18),
13. 9704959 - Enhancement-mode transistors with increased threshold voltage (2017-07-11),
14. 9634111 - Passivation technique for wide bandgap semiconductor devices (2017-04-25),
15. 9570600 - Semiconductor structure and recess formation etch technique (2017-02-14),

Title: Tomas Apostol Palacios - Innovator in Cambridge, MA

Introduction: Tomas Apostol Palacios is a renowned inventor based in Cambridge, MA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Tomas Apostol Palacios holds several patents in the areas of semiconductor devices, nanotechnology, and wireless communications, showcasing his expertise and creativity in these domains.

Career Highlights: With a distinguished career in academia and research, Palacios is a Professor at the Massachusetts Institute of Technology (MIT), where he leads a research group focused on developing novel electronic devices and systems.

Collaborations: Palacios has collaborated with leading technology companies and research institutions worldwide, fostering innovation and pushing the boundaries of what is possible in the realm of semiconductor technology.

Conclusion: Tomas Apostol Palacios continues to inspire and drive innovation in the field of technology, leaving a lasting impact on the industry with his pioneering work and dedication to advancing the frontiers of science.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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