San Jose, CA, United States of America

Thu V Nguyen

This inventor holds 18 USPTO granted patents and 2 EPO patents, primarily in Memory Circuit Design. Top assignees: Synopsys, Inc., Applied Materials, Inc., Cisco Technology, Inc.. Active years: 2000-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Thu V Nguyen. Retrieved from https://idiyas.com/inventor/thu-v-nguyen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 77.8


Average Co-Inventor Count = 2.1

ph-index = 7

Forward Citations = 172(Granted Patents)


Location History:

  • Palo Alto, CA (US) (2008 - 2019)
  • San Jose, CA (US) (2000 - 2023)

Company Filing History:


Years Active: 2000-2023

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Areas of Expertise:
IoT Power Management
Memory Cells
Vertical Nanowire Transistors
SRAM Architecture
Capacitive Coupling
Thermal Instability
Multi-Port Memory Circuits
Voltage Assist
Cleaning Processes
Semiconductor Processing
Circuit Methodology
Skew Compensation
18 patents (USPTO):Explore Patents

Title: **Innovator Spotlight: Thu V Nguyen**

Introduction

Thu V Nguyen is a prominent inventor based in San Jose, California, celebrated for her contributions to the field of electronics and semiconductor technology. With a remarkable portfolio of 18 patents, she continues to drive innovations that address critical challenges in the Internet of Things (IoT) landscape and memory technology.

Latest Patents

Among her latest inventions are two significant patents focused on enhancing the efficiency of IoT devices. The first patent introduces a power and performance management technique that reduces energy consumption within IoT devices without compromising operational performance. By dynamically adjusting the first internal supply voltage (VDDa) during idle states, leakage currents in the internal circuitry are minimized. This voltage can be lowered to one threshold voltage (Vtp) below the standard supply voltage.

The second patent tackles the issues of hot carrier injection and bias threshold instability in static random access memory (SRAM) arrays. By employing technology that detrapped charges in gate dielectrics of P-channel and N-channel transistors, this invention mitigates the detrimental effects of hot carrier injection (HCI), negative bias temperature instability (NBTI), and positive bias temperature instability (PBTI), ultimately enhancing the reliability and longevity of SRAM components.

Career Highlights

Thu has built a robust career working at industry leaders such as Synopsys, Inc. and Applied Materials, Inc. Her experiences in these influential companies have equipped her with a deep understanding of advanced technology and innovation processes.

Collaborations

Throughout her career, Thu has collaborated with distinguished professionals in the field, including colleagues such as Jamil Kawa and Sundar Iyer. These partnerships have played a significant role in advancing her research and enabling the development of her groundbreaking technologies.

Conclusion

Thu V Nguyen exemplifies the spirit of innovation, contributing significantly to the field of electronics through her extensive patent portfolio. Her work not only addresses current technological challenges but also paves the way for future advancements in the ever-evolving landscape of IoT and memory technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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