The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Aug. 20, 2015
Cisco Technology, Inc., San Jose, CA (US);
Sundar Iyer, Palo Alto, CA (US);
Shang-Tse Chuang, Los Altos, CA (US);
Thu Nguyen, Palo Alto, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the Vpower voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical '0' or logical '1' into either side of the SRAM bit cell.