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For the Inventor, By the Inventor

Hsinchu, Taiwan

Tasi-Jung Wu

This inventor holds 9 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2015-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tasi-Jung Wu. Retrieved from https://idiyas.com/inventor/tasi-jung-wu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 9

% Patents Active = 77.8

Average Co-Inventor Count = 6.9

ph-index = 3

Forward Citations = 35(Granted Patents)


Company Filing History:

goldMedal9 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2015-2023

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9 patents (USPTO):Explore Patents
1. 11728296 - Interconnect structure and method of forming same (2023-08-15),
2. 10811374 - Interconnect structure and method of forming same (2020-10-20),
3. 10157866 - Interconnect structure and method of forming same (2018-12-18),
4. 9953920 - Interconnect structure and method (2018-04-24),
5. 9748190 - Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation (2017-08-29),
6. 9679859 - Interconnect structure and method of forming same (2017-06-13),
7. 9252110 - Interconnect structure and method of forming same (2016-02-02),
8. 9006101 - Interconnect structure and method (2015-04-14),
9. 8951838 - Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation (2015-02-10),

Title: Tasi-Jung Wu: Innovator in Semiconductor Technology

Introduction

Tasi-Jung Wu is a prominent inventor based in Hsin-Chu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 9 patents. His work focuses on innovative interconnect structures that enhance the performance of electronic devices.

Latest Patents

One of Tasi-Jung Wu's latest patents is titled "Interconnect structure and method of forming same." This invention describes a device that includes a first side interconnect structure over a first side of a substrate. Active circuits are located in the substrate and are adjacent to the first side. Additionally, a dielectric layer is positioned over the second side of the substrate, with a pad embedded in the dielectric layer. The pad comprises an upper portion and a bottom portion formed of two different materials, along with a passivation layer over the dielectric layer. This innovative design aims to improve the efficiency and reliability of semiconductor devices.

Career Highlights

Tasi-Jung Wu is currently employed at Taiwan Semiconductor Manufacturing Company Ltd., a leading firm in the semiconductor industry. His expertise and innovative approach have contributed to the company's advancements in technology and product development.

Collaborations

Throughout his career, Tasi-Jung Wu has collaborated with notable colleagues, including Hsin-Yu Chen and Lin-Chih Huang. These partnerships have fostered a creative environment that encourages the development of cutting-edge technologies.

Conclusion

Tasi-Jung Wu is a key figure in the semiconductor industry, known for his innovative patents and contributions to technology. His work continues to influence the development of advanced electronic devices, showcasing the importance of innovation in this rapidly evolving field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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